Method and apparatus for determining an inherited affine parameter from an affine model

ABSTRACT

An apparatus for video decoding includes processing circuitry. The circuitry can be configured to receive a current block that is affine coded and included in a current coding tree unit (CTU), and determine an inherited affine candidate based on regular motion information of two minimum blocks in a rightmost column of minimum blocks of a left neighboring CTU of the current CTU when the current block is adjacent to a left boundary of the current CTU.

INCORPORATION BY REFERENCE

This present application claims the benefit of priority to U.S. Provisional Application No. 62/797,892, “Affine Model Inheritance with Reduced Local Buffer Requirement” filed on Jan. 28, 2019, which is incorporated by reference herein in its entirety.

TECHNICAL FIELD

The present disclosure describes embodiments generally related to video coding.

BACKGROUND

The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

Video coding and decoding can be performed using inter-picture prediction with motion compensation. Uncompressed digital video can include a series of pictures, each picture having a spatial dimension of, for example, 1920×1080 luminance samples and associated chrominance samples. The series of pictures can have a fixed or variable picture rate (informally also known as frame rate), of, for example 60 pictures per second or 60 Hz. Uncompressed video has significant bitrate requirements. For example, 1080p60 4:2:0 video at 8 bit per sample (1920×1080 luminance sample resolution at 60 Hz frame rate) requires close to 1.5 Gbit/s bandwidth. An hour of such video requires more than 600 GBytes of storage space.

One purpose of video coding and decoding can be the reduction of redundancy in the input video signal, through compression. Compression can help reduce the aforementioned bandwidth or storage space requirements, in some cases by two orders of magnitude or more. Both lossless and lossy compression, as well as a combination thereof can be employed. Lossless compression refers to techniques where an exact copy of the original signal can be reconstructed from the compressed original signal. When using lossy compression, the reconstructed signal may not be identical to the original signal, but the distortion between original and reconstructed signals is small enough to make the reconstructed signal useful for the intended application. In the case of video, lossy compression is widely employed. The amount of distortion tolerated depends on the application; for example, users of certain consumer streaming applications may tolerate higher distortion than users of television distribution applications. The compression ratio achievable can reflect that: higher allowable/tolerable distortion can yield higher compression ratios.

Motion compensation can be a lossy compression technique and can relate to techniques where a block of sample data from a previously reconstructed picture or part thereof (reference picture), after being spatially shifted in a direction indicated by a motion vector (MV henceforth), is used for the prediction of a newly reconstructed picture or picture part. In some cases, the reference picture can be the same as the picture currently under reconstruction. MVs can have two dimensions X and Y, or three dimensions, the third being an indication of the reference picture in use (the latter, indirectly, can be a time dimension).

In some video compression techniques, an MV applicable to a certain area of sample data can be predicted from other MVs, for example from those related to another area of sample data spatially adjacent to the area under reconstruction, and preceding that MV in decoding order. Doing so can substantially reduce the amount of data required for coding the MV, thereby removing redundancy and increasing compression. MV prediction can work effectively, for example, because when coding an input video signal derived from a camera (known as natural video) there is a statistical likelihood that areas larger than the area to which a single MV is applicable move in a similar direction and, therefore, can in some cases be predicted using a similar motion vector derived from MVs of neighboring area. That results in the MV found for a given area to be similar or the same as the MV predicted from the surrounding MVs, and that in turn can be represented, after entropy coding, in a smaller number of bits than what would be used if coding the MV directly. In some cases, MV prediction can be an example of lossless compression of a signal (namely: the MVs) derived from the original signal (namely: the sample stream). In other cases, MV prediction itself can be lossy, for example because of rounding errors when calculating a predictor from several surrounding MVs.

Various MV prediction mechanisms are described in H.265/HEVC (ITU-T Rec. H.265, “High Efficiency Video Coding”, December 2016). Out of the many MV prediction mechanisms that H.265 offers, described here is a technique henceforth referred to as “spatial merge”.

Referring to FIG. 1, a current block (101) comprises samples that have been found by the encoder during the motion search process to be predictable from a previous block of the same size that has been spatially shifted. Instead of coding that MV directly, the MV can be derived from metadata associated with one or more reference pictures, for example from the most recent (in decoding order) reference picture, using the MV associated with either one of five surrounding samples, denoted A0, A1, and B0, B1, B2 (102 through 106, respectively). In H.265, the MV prediction can use predictors from the same reference picture that the neighboring block is using.

SUMMARY

Aspects of the disclosure provide methods and apparatuses for video encoding/decoding. In some examples, an apparatus for video decoding includes processing circuitry. The circuitry can be configured to receive a current block that is affine coded and included in a current coding tree unit (CTU), and determine a first inherited affine candidate based on first regular motion information of two first minimum blocks in a rightmost column of minimum blocks of a left neighboring CTU of the current CTU when the current block is adjacent to a left boundary of the current CTU.

In an example, the circuitry is further configured to determine control point motion vectors (CPMVs) of the current block based on an affine model determined based on the first regular motion information of the two first minimum blocks. In an example, the circuitry is further configured to determine sub-block motion vectors (MVs) of the current block based on the first regular motion information of the two first minimum blocks without deriving the current block's CPMVs.

In an example, the circuitry is further configured to determine the first inherited affine candidate based on a four parameter affine model determined by using MVs of the two first minimum blocks that are adjacent to control points of an affine coded left neighboring block of the current block as an approximation of CPMVs at the control points of the affine coded left neighboring block.

In an example, the circuitry is further configured to determine the first inherited affine candidate based on a four parameter affine model determined by using precise positions of two MVs of the two first minimum blocks that are within an affine coded left neighboring block of the current block. In an example, a distance between the precise positions of the two MVs of the two first minimum blocks is a power of two. In an example, a first one of the two first minimum blocks is adjacent to a control point of the affine coded left neighboring block, and a distance between the precise positions of the two MVs of the two first minimum blocks is a half of a height of the affine coded left neighboring block.

In an example, the circuitry is further configured to include an inherited affine candidate from a history-based motion vector prediction (HMVP) table in a merge candidate list or an advanced motion vector prediction (AMVP) candidate list that includes at most two inherited affine candidates.

In an example, the circuitry is further configured to determine a second inherited affine candidate based on second regular motion information of two second minimum blocks in a bottom row of minimum blocks above a CTU row including the current CTU when the current block is adjacent to the top boundary of the current CTU.

In an example, the circuitry is further configured to determine the second inherited affine candidate based on a four parameter affine model determined by using precise positions of two MVs of the two second minimum blocks that are within an affine coded top neighboring block of the current block. In an example, a distance between the precise positions of the two MVs of the two second minimum blocks is a power of two. In an example, a first one of the two second minimum blocks is adjacent to a control point of the affine coded top neighboring block, and a distance between the precise positions of the two MVs of the two second minimum blocks is a half of a width of the affine coded top neighboring block.

In an example, the circuitry is further configured to include an inherited affine candidate from an HMVP table in a merge candidate list or an advanced motion vector prediction (AMVP) candidate list that includes at most two inherited affine candidates when the current block is adjacent to the top boundary of the current CTU,

In an example, the circuitry is further configured to, when the current block is not adjacent to the left or a top boundary of the current CTU, determine an inherited affine candidate based on an affine model of a spatial neighbor of the current block that is stored in a local buffer.

In an example, the circuitry is further configured to, when the current block is adjacent to a top-left corner, the left boundary, or a top boundary of the current CTU, check availability of affine coded blocks that are outside the current CTU and neighbor the current block at predefined candidate positions according to a predefined order, and determine one or more inherited affine candidates based on regular motion information of minimum blocks corresponding to first N available affine coded blocks, N being an integer greater than zero.

In an example, the circuitry is further configured to construct a merge candidate list or an AMVP candidate list, of which a maximum number of inherited affine candidates is more than two. In an example, when the current block is adjacent to a top or the left boundary of the current CTU but not adjacent to a top-left corner of the current CTU, the merge candidate list or the AMVP candidate list includes up to M1 inherited affine candidates from an HMVP table, M1 being an integer greater than or equal to 2, and up to N1 inherited affine candidates determined based on regular motion information of minimum blocks along the top or left boundary of the current CTU, N1 being an integer greater than or equal to 1. When the current block is adjacent to the top-left corner of the current CTU, the merge candidate list or the AMVP candidate list includes up to M2 inherited affine candidates from the HMVP table, M2 being an integer greater than or equal to 1, up to K inherited affine candidates determined based on regular motion information of minimum blocks along the top boundary of the current CTU, K being an integer greater than or equal to 1, and up to N2 inherited affine candidates determined based on regular motion information of minimum blocks along the left boundary of the current CTU, N2 being an integer greater than or equal to 1.

In an example, the circuitry is further configured to construct a merge candidate list or an AMVP candidate list including an inherited affine candidate from an HMVP table that includes an HMVP candidate representing an affine model with affine parameters.

Aspects of the disclosure also provide a non-transitory computer-readable medium storing instructions which when executed by a computer for video decoding cause the computer to perform the method for video decoding.

BRIEF DESCRIPTION OF THE DRAWINGS

Further features, the nature, and various advantages of the disclosed subject matter will be more apparent from the following detailed description and the accompanying drawings in which:

FIG. 1 is a schematic illustration of a current block and its surrounding spatial merge candidates in one example.

FIG. 2 is a schematic illustration of a simplified block diagram of a communication system in accordance with an embodiment.

FIG. 3 is a schematic illustration of a simplified block diagram of a communication system in accordance with an embodiment.

FIG. 4 is a schematic illustration of a simplified block diagram of a decoder in accordance with an embodiment.

FIG. 5 is a schematic illustration of a simplified block diagram of an encoder in accordance with an embodiment.

FIG. 6 shows a block diagram of an encoder in accordance with another embodiment.

FIG. 7 shows a block diagram of a decoder in accordance with another embodiment.

FIG. 8 is a schematic illustration of merge candidate positions of a merge mode in accordance with an embodiment.

FIG. 9 is a schematic illustration of spatial neighboring blocks and temporal neighboring blocks for a current block in accordance with an embodiment.

FIG. 10A is a schematic illustration of spatial neighboring blocks that can be used to determine predicting motion information for a current block using a sub-block based temporal motion vector prediction method based on motion information of the spatial neighboring blocks in accordance with one embodiment.

FIG. 10B is a schematic illustration of a selected spatial neighboring block for a sub-block based temporal motion vector prediction method in accordance with one embodiment.

FIG. 11A is a flow chart outlining a process of constructing and updating a list of motion information candidates using a history based motion vector prediction method in accordance with one embodiment.

FIG. 11B is a schematic illustration of updating the list of motion information candidates using the history based motion vector prediction method in accordance with one embodiment.

FIG. 12 is a schematic illustration of determining starting points at two reference pictures associated with two reference picture lists based on motion vectors of a merge candidate in a merge with motion vector difference (MMVD) mode in accordance with an embodiment.

FIG. 13 is a schematic illustration of predetermined points surrounding two starting points that are to be evaluated in the MMVD mode in accordance with an embodiment.

FIG. 14 shows a current coding tree unit (CTU) row and an above CTU row on top of the current CTU row.

FIG. 15 shows an example of affine inheritance from an above CTU line buffer.

FIG. 16 shows an example of affine inheritance from a left neighboring CTU.

FIG. 17 shows a current block adjacent to a top CTU boundary.

FIG. 18 shows a current block adjacent to a left CTU boundary.

FIG. 19 shows neighboring positions of a current block for availability checking for affine coded blocks.

FIG. 20 shows a flow chart outlining a process according to some embodiments of the disclosure.

FIG. 21 is a schematic illustration of a computer system in accordance with an embodiment.

DETAILED DESCRIPTION OF EMBODIMENTS I. Video Coding Encoder and Decoder

FIG. 2 illustrates a simplified block diagram of a communication system (200) according to an embodiment of the present disclosure. The communication system (200) includes a plurality of terminal devices that can communicate with each other, via, for example, a network (250). For example, the communication system (200) includes a first pair of terminal devices (210) and (220) interconnected via the network (250). In the FIG. 2 example, the first pair of terminal devices (210) and (220) performs unidirectional transmission of data. For example, the terminal device (210) may code video data (e.g., a stream of video pictures that are captured by the terminal device (210)) for transmission to the other terminal device (220) via the network (250). The encoded video data can be transmitted in the form of one or more coded video bitstreams. The terminal device (220) may receive the coded video data from the network (250), decode the coded video data to recover the video pictures and display video pictures according to the recovered video data. Unidirectional data transmission may be common in media serving applications and the like.

In another example, the communication system (200) includes a second pair of terminal devices (230) and (240) that performs bidirectional transmission of coded video data that may occur, for example, during videoconferencing. For bidirectional transmission of data, in an example, each terminal device of the terminal devices (230) and (240) may code video data (e.g., a stream of video pictures that are captured by the terminal device) for transmission to the other terminal device of the terminal devices (230) and (240) via the network (250). Each terminal device of the terminal devices (230) and (240) also may receive the coded video data transmitted by the other terminal device of the terminal devices (230) and (240), and may decode the coded video data to recover the video pictures and may display video pictures at an accessible display device according to the recovered video data.

In the FIG. 2 example, the terminal devices (210), (220), (230) and (240) may be illustrated as servers, personal computers and smart phones but the principles of the present disclosure may be not so limited. Embodiments of the present disclosure find application with laptop computers, tablet computers, media players and/or dedicated video conferencing equipment. The network (250) represents any number of networks that convey coded video data among the terminal devices (210), (220), (230) and (240), including for example wireline (wired) and/or wireless communication networks. The communication network (250) may exchange data in circuit-switched and/or packet-switched channels. Representative networks include telecommunications networks, local area networks, wide area networks and/or the Internet. For the purposes of the present discussion, the architecture and topology of the network (250) may be immaterial to the operation of the present disclosure unless explained herein below.

FIG. 3 illustrates, as an example for an application for the disclosed subject matter, the placement of a video encoder and a video decoder in a streaming environment. The disclosed subject matter can be equally applicable to other video enabled applications, including, for example, video conferencing, digital TV, storing of compressed video on digital media including CD, DVD, memory stick and the like, and so on.

A streaming system may include a capture subsystem (313), that can include a video source (301), for example a digital camera, creating for example a stream of video pictures (302) that are uncompressed. In an example, the stream of video pictures (302) includes samples that are taken by the digital camera. The stream of video pictures (302), depicted as a bold line to emphasize a high data volume when compared to encoded video data (304) (or coded video bitstreams), can be processed by an electronic device (320) that includes a video encoder (303) coupled to the video source (301). The video encoder (303) can include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter as described in more detail below. The encoded video data (304) (or encoded video bitstream (304)), depicted as a thin line to emphasize the lower data volume when compared to the stream of video pictures (302), can be stored on a streaming server (305) for future use. One or more streaming client subsystems, such as client subsystems (306) and (308) in FIG. 3 can access the streaming server (305) to retrieve copies (307) and (309) of the encoded video data (304). A client subsystem (306) can include a video decoder (310), for example, in an electronic device (330). The video decoder (310) decodes the incoming copy (307) of the encoded video data and creates an outgoing stream of video pictures (311) that can be rendered on a display (312) (e.g., display screen) or other rendering device (not depicted). In some streaming systems, the encoded video data (304), (307), and (309) (e.g., video bitstreams) can be encoded according to certain video coding/compression standards. Examples of those standards include ITU-T Recommendation H.265. In an example, a video coding standard under development is informally known as Versatile Video Coding (VVC). The disclosed subject matter may be used in the context of VVC.

It is noted that the electronic devices (320) and (330) can include other components (not shown). For example, the electronic device (320) can include a video decoder (not shown) and the electronic device (330) can include a video encoder (not shown) as well.

FIG. 4 shows a block diagram of a video decoder (410) according to an embodiment of the present disclosure. The video decoder (410) can be included in an electronic device (430). The electronic device (430) can include a receiver (431) (e.g., receiving circuitry). The video decoder (410) can be used in the place of the video decoder (310) in the FIG. 3 example.

The receiver (431) may receive one or more coded video sequences to be decoded by the video decoder (410); in the same or another embodiment, one coded video sequence at a time, where the decoding of each coded video sequence is independent from other coded video sequences. The coded video sequence may be received from a channel (401), which may be a hardware/software link to a storage device which stores the encoded video data. The receiver (431) may receive the encoded video data with other data, for example, coded audio data and/or ancillary data streams, that may be forwarded to their respective using entities (not depicted). The receiver (431) may separate the coded video sequence from the other data. To combat network jitter, a buffer memory (415) may be coupled in between the receiver (431) and an entropy decoder/parser (420) (“parser (420)” henceforth). In certain applications, the buffer memory (415) is part of the video decoder (410). In others, it can be outside of the video decoder (410) (not depicted). In still others, there can be a buffer memory (not depicted) outside of the video decoder (410), for example to combat network jitter, and in addition another buffer memory (415) inside the video decoder (410), for example to handle playout timing. When the receiver (431) is receiving data from a store/forward device of sufficient bandwidth and controllability, or from an isosynchronous network, the buffer memory (415) may not be needed, or can be small. For use on best effort packet networks such as the Internet, the buffer memory (415) may be required, can be comparatively large and can be advantageously of adaptive size, and may at least partially be implemented in an operating system or similar elements (not depicted) outside of the video decoder (410).

The video decoder (410) may include the parser (420) to reconstruct symbols (421) from the coded video sequence. Categories of those symbols include information used to manage operation of the video decoder (410), and potentially information to control a rendering device such as a render device (412) (e.g., a display screen) that is not an integral part of the electronic device (430) but can be coupled to the electronic device (430), as was shown in FIG. 4. The control information for the rendering device(s) may be in the form of Supplemental Enhancement Information (SEI messages) or Video Usability Information (VUI) parameter set fragments (not depicted). The parser (420) may parse/entropy-decode the coded video sequence that is received. The coding of the coded video sequence can be in accordance with a video coding technology or standard, and can follow various principles, including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, and so forth. The parser (420) may extract from the coded video sequence, a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder, based upon at least one parameter corresponding to the group. Subgroups can include Groups of Pictures (GOPs), pictures, tiles, slices, macroblocks, Coding Units (CUs), blocks, Transform Units (TUs), Prediction Units (PUs) and so forth. The parser (420) may also extract from the coded video sequence information such as transform coefficients, quantizer parameter values, motion vectors, and so forth.

The parser (420) may perform an entropy decoding/parsing operation on the video sequence received from the buffer memory (415), so as to create symbols (421).

Reconstruction of the symbols (421) can involve multiple different units depending on the type of the coded video picture or parts thereof (such as: inter and intra picture, inter and intra block), and other factors. Which units are involved, and how, can be controlled by the subgroup control information that was parsed from the coded video sequence by the parser (420). The flow of such subgroup control information between the parser (420) and the multiple units below is not depicted for clarity.

Beyond the functional blocks already mentioned, the video decoder (410) can be conceptually subdivided into a number of functional units as described below. In a practical implementation operating under commercial constraints, many of these units interact closely with each other and can, at least partly, be integrated into each other. However, for the purpose of describing the disclosed subject matter, the conceptual subdivision into the functional units below is appropriate.

A first unit is the scaler/inverse transform unit (451). The scaler/inverse transform unit (451) receives a quantized transform coefficient as well as control information, including which transform to use, block size, quantization factor, quantization scaling matrices, etc. as symbol(s) (421) from the parser (420). The scaler/inverse transform unit (451) can output blocks comprising sample values, that can be input into aggregator (455).

In some cases, the output samples of the scaler/inverse transform (451) can pertain to an intra coded block; that is: a block that is not using predictive information from previously reconstructed pictures, but can use predictive information from previously reconstructed parts of the current picture. Such predictive information can be provided by an intra picture prediction unit (452). In some cases, the intra picture prediction unit (452) generates a block of the same size and shape of the block under reconstruction, using surrounding already reconstructed information fetched from the current picture buffer (458). The current picture buffer (458) buffers, for example, partly reconstructed current picture and/or fully reconstructed current picture. The aggregator (455), in some cases, adds, on a per sample basis, the prediction information the intra prediction unit (452) has generated to the output sample information as provided by the scaler/inverse transform unit (451).

In other cases, the output samples of the scaler/inverse transform unit (451) can pertain to an inter coded, and potentially motion compensated block. In such a case, a motion compensation prediction unit (453) can access reference picture memory (457) to fetch samples used for prediction. After motion compensating the fetched samples in accordance with the symbols (421) pertaining to the block, these samples can be added by the aggregator (455) to the output of the scaler/inverse transform unit (451) (in this case called the residual samples or residual signal) so as to generate output sample information. The addresses within the reference picture memory (457) from where the motion compensation prediction unit (453) fetches prediction samples can be controlled by motion vectors, available to the motion compensation prediction unit (453) in the form of symbols (421) that can have, for example X, Y, and reference picture components. Motion compensation also can include interpolation of sample values as fetched from the reference picture memory (457) when sub-sample exact motion vectors are in use, motion vector prediction mechanisms, and so forth.

The output samples of the aggregator (455) can be subject to various loop filtering techniques in the loop filter unit (456). Video compression technologies can include in-loop filter technologies that are controlled by parameters included in the coded video sequence (also referred to as coded video bitstream) and made available to the loop filter unit (456) as symbols (421) from the parser (420), but can also be responsive to meta-information obtained during the decoding of previous (in decoding order) parts of the coded picture or coded video sequence, as well as responsive to previously reconstructed and loop-filtered sample values.

The output of the loop filter unit (456) can be a sample stream that can be output to the render device (412) as well as stored in the reference picture memory (457) for use in future inter-picture prediction.

Certain coded pictures, once fully reconstructed, can be used as reference pictures for future prediction. For example, once a coded picture corresponding to a current picture is fully reconstructed and the coded picture has been identified as a reference picture (by, for example, the parser (420)), the current picture buffer (458) can become a part of the reference picture memory (457), and a fresh current picture buffer can be reallocated before commencing the reconstruction of the following coded picture.

The video decoder (410) may perform decoding operations according to a predetermined video compression technology in a standard, such as ITU-T Rec. H.265. The coded video sequence may conform to a syntax specified by the video compression technology or standard being used, in the sense that the coded video sequence adheres to both the syntax of the video compression technology or standard and the profiles as documented in the video compression technology or standard. Specifically, a profile can select certain tools as the only tools available for use under that profile from all the tools available in the video compression technology or standard. Also necessary for compliance can be that the complexity of the coded video sequence is within bounds as defined by the level of the video compression technology or standard. In some cases, levels restrict the maximum picture size, maximum frame rate, maximum reconstruction sample rate (measured in, for example megasamples per second), maximum reference picture size, and so on. Limits set by levels can, in some cases, be further restricted through Hypothetical Reference Decoder (HRD) specifications and metadata for HRD buffer management signaled in the coded video sequence.

In an embodiment, the receiver (431) may receive additional (redundant) data with the encoded video. The additional data may be included as part of the coded video sequence(s). The additional data may be used by the video decoder (410) to properly decode the data and/or to more accurately reconstruct the original video data. Additional data can be in the form of, for example, temporal, spatial, or signal noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, and so on.

FIG. 5 shows a block diagram of a video encoder (503) according to an embodiment of the present disclosure. The video encoder (503) is included in an electronic device (520). The electronic device (520) includes a transmitter (540) (e.g., transmitting circuitry). The video encoder (503) can be used in the place of the video encoder (303) in the FIG. 3 example.

The video encoder (503) may receive video samples from a video source (501) (that is not part of the electronic device (520) in the FIG. 5 example) that may capture video image(s) to be coded by the video encoder (503). In another example, the video source (501) is a part of the electronic device (520).

The video source (501) may provide the source video sequence to be coded by the video encoder (503) in the form of a digital video sample stream that can be of any suitable bit depth (for example: 8 bit, 10 bit, 12 bit, . . . ), any colorspace (for example, BT.601 Y CrCB, RGB, . . . ), and any suitable sampling structure (for example Y CrCb 4:2:0, Y CrCb 4:4:4). In a media serving system, the video source (501) may be a storage device storing previously prepared video. In a videoconferencing system, the video source (501) may be a camera that captures local image information as a video sequence. Video data may be provided as a plurality of individual pictures that impart motion when viewed in sequence. The pictures themselves may be organized as a spatial array of pixels, wherein each pixel can comprise one or more samples depending on the sampling structure, color space, etc. in use. A person skilled in the art can readily understand the relationship between pixels and samples. The description below focuses on samples.

According to an embodiment, the video encoder (503) may code and compress the pictures of the source video sequence into a coded video sequence (543) in real time or under any other time constraints as required by the application. Enforcing appropriate coding speed is one function of a controller (550). In some embodiments, the controller (550) controls other functional units as described below and is functionally coupled to the other functional units. The coupling is not depicted for clarity. Parameters set by the controller (550) can include rate control related parameters (picture skip, quantizer, lambda value of rate-distortion optimization techniques, . . . ), picture size, group of pictures (GOP) layout, maximum motion vector search range, and so forth. The controller (550) can be configured to have other suitable functions that pertain to the video encoder (503) optimized for a certain system design.

In some embodiments, the video encoder (503) is configured to operate in a coding loop. As an oversimplified description, in an example, the coding loop can include a source coder (530) (e.g., responsible for creating symbols, such as a symbol stream, based on an input picture to be coded, and a reference picture(s)), and a (local) decoder (533) embedded in the video encoder (503). The decoder (533) reconstructs the symbols to create the sample data in a similar manner as a (remote) decoder also would create (as any compression between symbols and coded video bitstream is lossless in the video compression technologies considered in the disclosed subject matter). The reconstructed sample stream (sample data) is input to the reference picture memory (534). As the decoding of a symbol stream leads to bit-exact results independent of decoder location (local or remote), the content in the reference picture memory (534) is also bit exact between the local encoder and remote encoder. In other words, the prediction part of an encoder “sees” as reference picture samples exactly the same sample values as a decoder would “see” when using prediction during decoding. This fundamental principle of reference picture synchronicity (and resulting drift, if synchronicity cannot be maintained, for example because of channel errors) is used in some related arts as well.

The operation of the “local” decoder (533) can be the same as of a “remote” decoder, such as the video decoder (410), which has already been described in detail above in conjunction with FIG. 4. Briefly referring also to FIG. 4, however, as symbols are available and encoding/decoding of symbols to a coded video sequence by an entropy coder (545) and the parser (420) can be lossless, the entropy decoding parts of the video decoder (410), including the buffer memory (415), and parser (420) may not be fully implemented in the local decoder (533).

An observation that can be made at this point is that any decoder technology except the parsing/entropy decoding that is present in a decoder also necessarily needs to be present, in substantially identical functional form, in a corresponding encoder. For this reason, the disclosed subject matter focuses on decoder operation. The description of encoder technologies can be abbreviated as they are the inverse of the comprehensively described decoder technologies. Only in certain areas a more detail description is required and provided below.

During operation, in some examples, the source coder (530) may perform motion compensated predictive coding, which codes an input picture predictively with reference to one or more previously-coded picture from the video sequence that were designated as “reference pictures”. In this manner, the coding engine (532) codes differences between pixel blocks of an input picture and pixel blocks of reference picture(s) that may be selected as prediction reference(s) to the input picture.

The local video decoder (533) may decode coded video data of pictures that may be designated as reference pictures, based on symbols created by the source coder (530). Operations of the coding engine (532) may advantageously be lossy processes. When the coded video data may be decoded at a video decoder (not shown in FIG. 5), the reconstructed video sequence typically may be a replica of the source video sequence with some errors. The local video decoder (533) replicates decoding processes that may be performed by the video decoder on reference pictures and may cause reconstructed reference pictures to be stored in the reference picture cache (534). In this manner, the video encoder (503) may store copies of reconstructed reference pictures locally that have common content as the reconstructed reference pictures that will be obtained by a far-end video decoder (absent transmission errors).

The predictor (535) may perform prediction searches for the coding engine (532). That is, for a new picture to be coded, the predictor (535) may search the reference picture memory (534) for sample data (as candidate reference pixel blocks) or certain metadata such as reference picture motion vectors, block shapes, and so on, that may serve as an appropriate prediction reference for the new pictures. The predictor (535) may operate on a sample block-by-pixel block basis to find appropriate prediction references. In some cases, as determined by search results obtained by the predictor (535), an input picture may have prediction references drawn from multiple reference pictures stored in the reference picture memory (534).

The controller (550) may manage coding operations of the source coder (530), including, for example, setting of parameters and subgroup parameters used for encoding the video data.

Output of all aforementioned functional units may be subjected to entropy coding in the entropy coder (545). The entropy coder (545) translates the symbols as generated by the various functional units into a coded video sequence, by lossless compressing the symbols according to technologies such as Huffman coding, variable length coding, arithmetic coding, and so forth.

The transmitter (540) may buffer the coded video sequence(s) as created by the entropy coder (545) to prepare for transmission via a communication channel (560), which may be a hardware/software link to a storage device which would store the encoded video data. The transmitter (540) may merge coded video data from the video coder (503) with other data to be transmitted, for example, coded audio data and/or ancillary data streams (sources not shown).

The controller (550) may manage operation of the video encoder (503). During coding, the controller (550) may assign to each coded picture a certain coded picture type, which may affect the coding techniques that may be applied to the respective picture. For example, pictures often may be assigned as one of the following picture types:

An Intra Picture (I picture) may be one that may be coded and decoded without using any other picture in the sequence as a source of prediction. Some video codecs allow for different types of intra pictures, including, for example Independent Decoder Refresh (“IDR”) Pictures. A person skilled in the art is aware of those variants of I pictures and their respective applications and features.

A predictive picture (P picture) may be one that may be coded and decoded using intra prediction or inter prediction using at most one motion vector and reference index to predict the sample values of each block.

A bi-directionally predictive picture (B Picture) may be one that may be coded and decoded using intra prediction or inter prediction using at most two motion vectors and reference indices to predict the sample values of each block. Similarly, multiple-predictive pictures can use more than two reference pictures and associated metadata for the reconstruction of a single block.

Source pictures commonly may be subdivided spatially into a plurality of sample blocks (for example, blocks of 4×4, 8×8, 4×8, or 16×16 samples each) and coded on a block-by-block basis. Blocks may be coded predictively with reference to other (already coded) blocks as determined by the coding assignment applied to the blocks' respective pictures. For example, blocks of I pictures may be coded non-predictively or they may be coded predictively with reference to already coded blocks of the same picture (spatial prediction or intra prediction). Pixel blocks of P pictures may be coded predictively, via spatial prediction or via temporal prediction with reference to one previously coded reference picture. Blocks of B pictures may be coded predictively, via spatial prediction or via temporal prediction with reference to one or two previously coded reference pictures.

The video encoder (503) may perform coding operations according to a predetermined video coding technology or standard, such as ITU-T Rec. H.265. In its operation, the video encoder (503) may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancies in the input video sequence. The coded video data, therefore, may conform to a syntax specified by the video coding technology or standard being used.

In an embodiment, the transmitter (540) may transmit additional data with the encoded video. The source coder (530) may include such data as part of the coded video sequence. Additional data may comprise temporal/spatial/SNR enhancement layers, other forms of redundant data such as redundant pictures and slices, SEI messages, VUI parameter set fragments, and so on.

A video may be captured as a plurality of source pictures (video pictures) in a temporal sequence. Intra-picture prediction (often abbreviated to intra prediction) makes use of spatial correlation in a given picture, and inter-picture prediction makes uses of the (temporal or other) correlation between the pictures. In an example, a specific picture under encoding/decoding, which is referred to as a current picture, is partitioned into blocks. When a block in the current picture is similar to a reference block in a previously coded and still buffered reference picture in the video, the block in the current picture can be coded by a vector that is referred to as a motion vector. The motion vector points to the reference block in the reference picture, and can have a third dimension identifying the reference picture, in case multiple reference pictures are in use.

In some embodiments, a bi-prediction technique can be used in the inter-picture prediction. According to the bi-prediction technique, two reference pictures, such as a first reference picture and a second reference picture that are both prior in decoding order to the current picture in the video (but may be in the past and future, respectively, in display order) are used. A block in the current picture can be coded by a first motion vector that points to a first reference block in the first reference picture, and a second motion vector that points to a second reference block in the second reference picture. The block can be predicted by a combination of the first reference block and the second reference block.

Further, a merge mode technique can be used in the inter-picture prediction to improve coding efficiency.

According to some embodiments of the disclosure, predictions, such as inter-picture predictions and intra-picture predictions are performed in the unit of blocks. For example, according to the HEVC standard, a picture in a sequence of video pictures is partitioned into coding tree units (CTU) for compression, the CTUs in a picture have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. In general, a CTU includes three coding tree blocks (CTBs), which are one luma CTB and two chroma CTBs. Each CTU can be recursively quadtree split into one or multiple coding units (CUs). For example, a CTU of 64×64 pixels can be split into one CU of 64×64 pixels, or 4 CUs of 32×32 pixels, or 16 CUs of 16×16 pixels. In an example, each CU is analyzed to determine a prediction type for the CU, such as an inter prediction type or an intra prediction type. The CU is split into one or more prediction units (PUs) depending on the temporal and/or spatial predictability. Generally, each PU includes a luma prediction block (PB), and two chroma PBs. In an embodiment, a prediction operation in coding (encoding/decoding) is performed in the unit of a prediction block. Using a luma prediction block as an example of a prediction block, the prediction block includes a matrix of values (e.g., luma values) for pixels, such as 8×8 pixels, 16×16 pixels, 8×16 pixels, 16×8 pixels, and the like.

FIG. 6 shows a diagram of a video encoder (603) according to another embodiment of the disclosure. The video encoder (603) is configured to receive a processing block (e.g., a prediction block) of sample values within a current video picture in a sequence of video pictures, and encode the processing block into a coded picture that is part of a coded video sequence. In an example, the video encoder (603) is used in the place of the video encoder (303) in the FIG. 3 example.

In an HEVC example, the video encoder (603) receives a matrix of sample values for a processing block, such as a prediction block of 8×8 samples, and the like. The video encoder (603) determines whether the processing block is best coded using intra mode, inter mode, or bi-prediction mode using, for example, rate-distortion optimization. When the processing block is to be coded in intra mode, the video encoder (603) may use an intra prediction technique to encode the processing block into the coded picture; and when the processing block is to be coded in inter mode or bi-prediction mode, the video encoder (603) may use an inter prediction or bi-prediction technique, respectively, to encode the processing block into the coded picture. In certain video coding technologies, merge mode can be an inter picture prediction submode where the motion vector is derived from one or more motion vector predictors without the benefit of a coded motion vector component outside the predictors. In certain other video coding technologies, a motion vector component applicable to the subject block may be present. In an example, the video encoder (603) includes other components, such as a mode decision module (not shown) to determine the mode of the processing blocks.

In the FIG. 6 example, the video encoder (603) includes the inter encoder (630), an intra encoder (622), a residue calculator (623), a switch (626), a residue encoder (624), a general controller (621), and an entropy encoder (625) coupled together as shown in FIG. 6.

The inter encoder (630) is configured to receive the samples of the current block (e.g., a processing block), compare the block to one or more reference blocks in reference pictures (e.g., blocks in previous pictures and later pictures), generate inter prediction information (e.g., description of redundant information according to inter encoding technique, motion vectors, merge mode information), and calculate inter prediction results (e.g., predicted block) based on the inter prediction information using any suitable technique. In some examples, the reference pictures are decoded reference pictures that are decoded based on the encoded video information.

The intra encoder (622) is configured to receive the samples of the current block (e.g., a processing block), in some cases compare the block to blocks already coded in the same picture, generate quantized coefficients after transform, and in some cases also intra prediction information (e.g., an intra prediction direction information according to one or more intra encoding techniques). In an example, the intra encoder (622) also calculates intra prediction results (e.g., predicted block) based on the intra prediction information and reference blocks in the same picture.

The general controller (621) is configured to determine general control data and control other components of the video encoder (603) based on the general control data. In an example, the general controller (621) determines the mode of the block, and provides a control signal to the switch (626) based on the mode. For example, when the mode is the intra mode, the general controller (621) controls the switch (626) to select the intra mode result for use by the residue calculator (623), and controls the entropy encoder (625) to select the intra prediction information and include the intra prediction information in the bitstream; and when the mode is the inter mode, the general controller (621) controls the switch (626) to select the inter prediction result for use by the residue calculator (623), and controls the entropy encoder (625) to select the inter prediction information and include the inter prediction information in the bitstream.

The residue calculator (623) is configured to calculate a difference (residue data) between the received block and prediction results selected from the intra encoder (622) or the inter encoder (630). The residue encoder (624) is configured to operate based on the residue data to encode the residue data to generate the transform coefficients. In an example, the residue encoder (624) is configured to convert the residue data from a spatial domain to a frequency domain, and generate the transform coefficients. The transform coefficients are then subject to quantization processing to obtain quantized transform coefficients. In various embodiments, the video encoder (603) also includes a residue decoder (628). The residue decoder (628) is configured to perform inverse-transform, and generate the decoded residue data. The decoded residue data can be suitably used by the intra encoder (622) and the inter encoder (630). For example, the inter encoder (630) can generate decoded blocks based on the decoded residue data and inter prediction information, and the intra encoder (622) can generate decoded blocks based on the decoded residue data and the intra prediction information. The decoded blocks are suitably processed to generate decoded pictures and the decoded pictures can be buffered in a memory circuit (not shown) and used as reference pictures in some examples.

The entropy encoder (625) is configured to format the bitstream to include the encoded block. The entropy encoder (625) is configured to include various information according to a suitable standard, such as the HEVC standard. In an example, the entropy encoder (625) is configured to include the general control data, the selected prediction information (e.g., intra prediction information or inter prediction information), the residue information, and other suitable information in the bitstream. Note that, according to the disclosed subject matter, when coding a block in the merge submode of either inter mode or bi-prediction mode, there is no residue information.

FIG. 7 shows a diagram of a video decoder (710) according to another embodiment of the disclosure. The video decoder (710) is configured to receive coded pictures that are part of a coded video sequence, and decode the coded pictures to generate reconstructed pictures. In an example, the video decoder (710) is used in the place of the video decoder (310) in the FIG. 3 example.

In the FIG. 7 example, the video decoder (710) includes an entropy decoder (771), an inter decoder (780), a residue decoder (773), a reconstruction module (774), and an intra decoder (772) coupled together as shown in FIG. 7.

The entropy decoder (771) can be configured to reconstruct, from the coded picture, certain symbols that represent the syntax elements of which the coded picture is made up. Such symbols can include, for example, the mode in which a block is coded (such as, for example, intra mode, inter mode, bi-predicted mode, the latter two in merge submode or another submode), prediction information (such as, for example, intra prediction information or inter prediction information) that can identify certain sample or metadata that is used for prediction by the intra decoder (772) or the inter decoder (780), respectively, residual information in the form of, for example, quantized transform coefficients, and the like. In an example, when the prediction mode is inter or bi-predicted mode, the inter prediction information is provided to the inter decoder (780); and when the prediction type is the intra prediction type, the intra prediction information is provided to the intra decoder (772). The residual information can be subject to inverse quantization and is provided to the residue decoder (773).

The inter decoder (780) is configured to receive the inter prediction information, and generate inter prediction results based on the inter prediction information.

The intra decoder (772) is configured to receive the intra prediction information, and generate prediction results based on the intra prediction information.

The residue decoder (773) is configured to perform inverse quantization to extract de-quantized transform coefficients, and process the de-quantized transform coefficients to convert the residual from the frequency domain to the spatial domain. The residue decoder (773) may also require certain control information (to include the Quantizer Parameter (QP)), and that information may be provided by the entropy decoder (771) (data path not depicted as this may be low volume control information only).

The reconstruction module (774) is configured to combine, in the spatial domain, the residual as output by the residue decoder (773) and the prediction results (as output by the inter or intra prediction modules as the case may be) to form a reconstructed block, that may be part of the reconstructed picture, which in turn may be part of the reconstructed video. It is noted that other suitable operations, such as a deblocking operation and the like, can be performed to improve the visual quality.

It is noted that the video encoders (303), (503), and (603), and the video decoders (310), (410), and (710) can be implemented using any suitable technique. In an embodiment, the video encoders (303), (503), and (603), and the video decoders (310), (410), and (710) can be implemented using one or more integrated circuits. In another embodiment, the video encoders (303), (503), and (503), and the video decoders (310), (410), and (710) can be implemented using one or more processors that execute software instructions.

II. Inter Picture Prediction Modes

In various embodiments, a picture can be partitioned into blocks, for example, using a tree structure based partition scheme. The resulting blocks can then be processed with different processing modes, such as an intra prediction mode, an inter prediction mode (e.g., merge mode, skip mode, advanced motion vector prediction (AVMP) mode), and the like. An intra coded block can be a block that is coded with an intra prediction mode. In contrast, an inter coded block can be a bock that is processed with an inter prediction mode.

1. Regular Merge Mode

When a currently processed block, referred to as a current block, is processed with a merge mode, a neighboring block can be selected from a spatial or temporal neighborhood of the current block. The current block can be merged with the selected neighboring block by sharing a same set of motion data (or referred to as motion information) from the selected neighboring block. This merge mode operation can be performed over a group of neighboring blocks, such that a region of neighboring blocks can be merged together and share a same set of motion data. During transmission from an encoder to a decoder, an index indicating the motion data of the selected neighboring block can be transmitted for the current block, instead of transmission of the whole set of motion data. In this way, an amount of data (bits) that are used for transmission of motion information can be reduced, and coding efficiency can be improved.

In the above example, the neighboring block, which provides the motion data, can be selected from a set of candidate positions. The candidate positions can be predefined with respect to the current block. For example, the candidate positions can include spatial candidate positions and temporal candidate positions. Each spatial candidate position is associated with a spatial neighboring block neighboring the current block. Each temporal candidate position is associated with a temporal neighboring block located in another coded picture (e.g., a previously coded picture). Neighboring blocks overlapping the candidate positions (referred to as candidate blocks) are a subset of all the spatial or temporal neighboring blocks of the current block. In this way, the candidate blocks can be evaluated for selection of a to-be-merged block instead of the whole set of neighboring blocks.

FIG. 8 shows an example of candidate positions. From those candidate positions, a set of merge candidates can be selected to construct a merge candidate list. As shown, a current block (810) is to be processed with merge mode. A set of candidate positions {A1, B1, B0, A0, B2, C0, C1} are defined for the merge mode processing. Specifically, candidate positions {A1, B1, B0, A0, B2} are spatial candidate positions that represent positions of candidate blocks that are in the same picture as the current block (810). In contrast, candidate positions {C0, C1} are temporal candidate positions that represent positions of candidate blocks that are in another coded picture and neighbor or overlap a co-located block of the current block (810). As shown, the candidate position C1 can be located near (e.g., adjacent to) a center of the current block (810).

A candidate position can be represented by a block of samples or a sample in different examples. In FIG. 8, each candidate position is represented by a block of samples, for example, having a size of 4×4 samples. A size of such a block of samples corresponding to a candidate position can be equal to or smaller than a minimum allowable size of PBs (e.g., 4×4 samples) defined for a tree-based partitioning scheme used for generating the current block (810). Under such a configuration, a block corresponding to a candidate position can always be covered within a single neighboring PB. In an alternative example, a sample position (e.g., a bottom-right sample within the block A1, or a top-right sample within the block A0) may be used to represent a candidate position. Such a sample is referred to as a representative sample, while such a position is referred to as a representative position.

In one example, based on the candidate positions {A1, B1, B0, A0, B2, C0, C1} defined in FIG. 8, a merge mode process can be performed to select merge candidates from the candidate positions {A1, B1, B0, A0, B2, C0, C1} to construct a candidate list. The candidate list can have a predefined maximum number of merge candidates, represented as Cm. Each merge candidate in the candidate list can include a set of motion data that can be used for motion-compensated prediction.

The merge candidates can be listed in the candidate list according to a certain order. For example, depending on how the merge candidate is derived, different merge candidates may have different probabilities of being selected. The merge candidates having higher probabilities of being selected are positioned in front of the merge candidates having lower probabilities of being selected. Based on such an order, each merge candidate is associated with an index (referred to as a merge index). In one embodiment, a merge candidate having a higher probability of being selected will have a smaller index value such that fewer bits are needed for coding the respective index.

In one example, the motion data of a merge candidate can include horizontal and vertical motion vector displacement values of one or two motion vectors, one or two reference picture indices associated with the one or two motion vectors, and optionally an identification of which reference picture list is associated with an reference picture index.

In an example, according to a predefined order, a first number of merge candidates, Ca, is derived from the spatial candidate positions according to the order {A1, B1, B0, A0, B2}, and a second number of merge candidates, Cb=Cm−Ca, is derived from the temporal candidate positions according to the order {C0, C1}. The numerals A1, B1, B0, A0, B2, C0, C1 for representing candidate positions can also be used to refer to merge candidates. For example, a merge candidate obtained from candidate position A1 is referred to as the merge candidate A1.

In some scenarios, a merge candidate at a candidate position may be unavailable. For example, a candidate block at a candidate position can be intra-predicted, outside of a slice or tile including the current block (810), or not in a same coding tree block (CTB) row as the current block (810). In some scenarios, a merge candidate at a candidate position may be redundant. For example, one neighboring block of the current block (810) can overlap two candidate positions. The redundant merge candidate can be removed from the candidate list (e.g., by performing a pruning process). When a total number of available merge candidates (with redundant candidates being removed) in the candidate list is smaller than the maximum number of merge candidates Cm, additional merge candidates can be generated (e.g., according to a preconfigured rule) to fill the candidate list such that the candidate list can be maintained to have a fixed length. For example, additional merge candidates can include combined bi-predictive candidates and zero motion vector candidates.

After the candidate list is constructed, at an encoder, an evaluation process can be performed to select a merge candidate from the candidate list. For example, rate-distortion (RD) performance corresponding to each merge candidate can be calculated, and the one with the best RD performance can be selected. Accordingly, a merge index associated with the selected merge candidate can be determined for the current block (810) and signaled to a decoder.

At a decoder, the merge index of the current block (810) can be received. A similar candidate list construction process, as described above, can be performed to generate a candidate list that is the same as the candidate list generated at the encoder side. After the candidate list is constructed, a merge candidate can be selected from the candidate list based on the received merge index without performing any further evaluations in some examples. Motion data of the selected merge candidate can be used for a subsequent motion-compensated prediction of the current block (810).

A skip mode is also introduced in some examples. For example, in the skip mode, a current block can be predicted using a merge mode as described above to determine a set of motion data, however, no residue is generated, and no transform coefficients are transmitted. A skip flag can be associated with the current block. The skip flag and a merge index indicating the related motion information of the current block can be signaled to a video decoder. For example, at the beginning of a CU in an inter-picture prediction slice, a skip flag can be signaled that implies the following: the CU only contains one PU (2N×2N); the merge mode is used to derive the motion data; and no residual data is present in the bitstream. At the decoder side, based on the skip flag, a prediction block can be determined based on the merge index for decoding a respective current block without adding residue information. Thus, various methods for video coding with merge mode disclosed herein can be utilized in combination with a skip mode.

As an example, in an embodiment, when a merge flag or a skip flag is signaled as true in a bitstream, a merge index is then signaled to indicate which candidate in a merge candidate list will be used to provide motion vectors for a current block. Up to four spatially neighboring motion vectors and up to one temporally neighboring motion vectors can be added to the merge candidate list. A syntax MaxMergeCandsNum is defined as the size of the merge candidate list. The syntax MaxMergeVandsNum can be signaled in the bitstream.

2. Affine Merge Mode

FIG. 9 is a schematic illustration of spatial neighboring blocks and a temporal neighboring block of a current block (or referred to as a coding unit (CU)) (901) in accordance with an embodiment. As shown, the spatial neighboring blocks are denoted A0, A1, A2, B0, B1, B2, and B3 (902, 903, 907, 904, 905, 906, and 908, respectively), and the temporal neighboring block are denoted C0 (912). In some examples, the spatial neighboring blocks A0, A1, A2, B0, B1, B2, and B3 and the current block (901) belong to a same picture. In some examples, the temporal neighboring block C0 belongs to a reference picture and corresponds to a position outside the current block (901) and adjacent to a lower-right corner of the current block (901).

In some examples, a motion vector of the current block (901) and/or sub-blocks of the current block can be derived using an affine model (e.g., a 6-parameter affine model or a 4-parameter affine model). In some examples, an affine model has 6 parameters (e.g., a 6-parameter affine model) to describe the motion vector of a block. In an example, the 6 parameters of an affine coded block can be represented by three motion vectors (also referred to as three control point motion vectors (CPMVs)) at three different locations of the block (e.g., control points CP0, CP1, and CP2 at upper-left, upper-right, and lower-left corners in FIG. 9). In another example, a simplified affine model uses four parameters to describe the motion information of an affine coded block, which can be represented by two motion vectors (also referred to as two CPMVs) at two different locations of the block (e.g., control points CP0 and CP1 at upper-left and upper-right corners in FIG. 9).

A list of motion information candidates (also referred to as an affine merge candidate list) can be constructed using an affine merge mode based on motion information of one or more of the spatial neighboring blocks and/or temporal neighboring blocks. In some examples, the affine merge mode can be applied when the current block (901) has a width and height that are equal to or greater than 8 samples. According to the affine merge mode, the CPMVs of the current block (901) can be determined based on the motion information candidates on the list. In some examples, the list of motion information candidates can include up to five CPMV candidates, and an index can be signaled to indicate which CPMV candidate is to be used for the current block.

In some embodiments, the affine merge candidate list can have three types of CPVM candidates, including inherited affine candidates, constructed affine candidates, and a zero MV. An inherited affine candidate can be derived by extrapolation from the CPMVs of the neighboring blocks. A constructed affine candidate can be derived using the translational MVs of the neighboring blocks.

In an example, there can be at most two inherited affine candidates, which are derived from corresponding affine motion models of the neighboring blocks, including one block from left neighboring blocks (A0 and A1) and one from upper neighboring blocks (B0, B1, and B2). For the candidate from the left, neighboring blocks A0 and A1 can be sequentially checked, and a first available inherited affine candidate from neighboring blocks A0 and A1 is used as the inherited affine candidate from the left. For the candidate from the top, neighboring blocks B0, B1, and B2 can be sequentially checked, and a first available inherited affine candidate from neighboring blocks B0, B1, and B2 is used as the inherited affine candidate from the top. In some examples, no pruning check is performed between the two inherited affine candidates.

When a neighboring affine block is identified, a corresponding inherited affine candidate to be added to the affine merge list of the current block (901) can be derived from the control point motion vectors of the neighboring affine block. In the FIG. 9 example, if the neighboring block A1 is coded in affine mode, the motion vectors of the upper-left corner (control point CP0_(A1)), the upper-right corner (control point CP1_(A1)), and the lower-left corner (control point CP2_(A1)) of block A1 can be obtained. When block A1 is coded using a 4-parameter affine model, the two CPMVs as an inherited affine candidate of the current block (901) can be calculated according to the motion vectors of control point CP0_(A1) and control point CP1_(A1). When block A1 is coded using a 6-parameter affine model, the three CPMVs as an inherited affine candidate of the current block (901) can be calculated according to the motion vectors of control point CP0_(A1), control point CP1_(A1), and control point CP2_(A1).

Moreover, a constructed affine candidate can be derived by combining the neighboring translational motion information of each control point. The motion information for the control points CP0, CP1, and CP2 is derived from the specified spatial neighboring blocks A0, A1, A2, B0, B1, B2, and B3.

For example, CPMV_(k) (k=1, 2, 3, 4) represents the motion vector of the k-th control point, where CPMV₁ corresponds to control point CP0, CPMV₂ corresponds to control point CP1, CPMV₃ corresponds to control point CP2, and CPMV₄ corresponds to a temporal control point based on temporal neighboring block C0. For CPMV₁, neighboring blocks B2, B3, and A2 can be sequentially checked, and a first available motion vector from neighboring blocks B2, B3, and A2 is used as CPMV₁. For CPMV₂, neighboring blocks B1 and B0 can be sequentially checked, and a first available motion vector from neighboring blocks B1 and B0 is used as CPMV₂. For CPMV₃, neighboring blocks A1 and A0 can be sequentially checked, and a first available motion vector from neighboring blocks A1 and A0 is used as CPMV₃. Moreover, the motion vector of temporal neighboring block C0 can be used as CPMV₄, if available.

After CPMV₁, CPMV₂, CPMV₃, and CPMV₄, of four control points CP0, CP1, CP2 and the temporal control point are obtained, an affine merge candidate list can be constructed to include affine merge candidates that are constructed in an order of: {CPMV₁, CPMV₂, CPMV₃}, {CPMV₁, CPMV₂, CPMV₄}, {CPMV₁, CPMV₃, CPMV₄}, {CPMV₂, CPMV₃, CPMV₄}, {CPMV₁, CPMV₂}, and {CPMV₁, CPMV₃}. Any combination of three CPMVs can form a 6-parameter affine merge candidate, and any combination of two CPMVs can form a 4-parameter affine merge candidate. In some examples, in order to avoid a motion scaling process, if the reference indices of a group of control points are different, the corresponding combination of CPMVs can be discarded.

3. Subblock-Based Temporal Motion Vector Prediction (SbTMVP) Mode

FIG. 10A is a schematic illustration of spatial neighboring blocks that can be used to determine predicting motion information for a current block (1011) using a sub-block based temporal MV prediction (SbTMVP) method based on motion information of the spatial neighboring blocks in accordance with one embodiment. FIG. 10A shows a current block (1011) and its spatial neighboring blocks denoted A0, A1, B0, and B1 (1012, 1013, 1014, and 1015, respectively). In some examples, spatial neighboring blocks A0, A1, B0, and B1 and the current block (1011) belong to a same picture.

FIG. 10B is a schematic illustration of determining motion information for sub-blocks of the current block (1011) using the SbTMVP method based on a selected spatial neighboring block, such as block A1 in this non-limiting example, in accordance with an embodiment. In this example, the current block (1011) is in a current picture (1010), and a reference block (1061) is in a reference picture (1060) and can be identified based on a motion shift (or displacement) between the current block (1011) and the reference block (1061) indicated by a motion vector (1022).

In some embodiments, similar to a temporal motion vector prediction (TMVP) in HEVC, a SbTMVP uses the motion information in various reference sub-blocks in a reference picture for a current block in a current picture. In some embodiments, the same reference picture used by TMVP can be used for SbTVMP. In some embodiments, TMVP predicts motion information at a CU level but SbTMVP predicts motion at a sub-CU level. In some embodiments, TMVP uses the temporal motion vectors from collocated block in the reference picture, which has a corresponding position adjacent to a lower-right corner or a center of a current block, and SbTMVP uses the temporal motion vectors from a reference block, which can be identified by performing a motion shift based on a motion vector from one of the spatial neighboring blocks of the current block.

For example, as shown in FIG. 10A, neighboring blocks A1, B1, B0, and A0 can be sequentially checked in a SbTVMP process. As soon as a first spatial neighboring block that has a motion vector that uses the reference picture (1060) as its reference picture is identified, such as block A1 having the motion vector (1022) that points to a reference block AR1 in the reference picture (1060) for example, this motion vector (1022) can be used for performing the motion shift. If no such motion vector is available from the spatial neighboring blocks A1, B1, B0, and A0, the motion shift is set to (0, 0).

After determining the motion shift, the reference block (1061) can be identified based on a position of the current block (1011) and the determined motion shift. In FIG. 10B, the reference block (1061) can be further divided into 16 sub-blocks with reference motion information MRa through MRp. In some examples, the reference motion information for each sub-block in the reference block (1061) can be determined based on a smallest motion grid that covers a center sample of such sub-block. The motion information can include motion vectors and corresponding reference indices. The current block (1011) can be further divided into 16 sub-blocks, and the motion information MVa through MVp for the sub-blocks in the current block (1011) can be derived from the reference motion information MRa through MRp in a manner similar to the TMVP process, with temporal scaling in some examples.

The sub-block size used in the SbTMVP process can be fixed (or otherwise predetermined) or signaled. In some examples, the sub-block size used in the SbTMVP process can be 8×8 samples. In some examples, the SbTMVP process is only applicable to a block with a width and height equal to or greater than the fixed or signaled size, for example 8 pixels.

In an example, a combined sub-block based merge list which contains a SbTVMP candidate and affine merge candidates is used for the signaling of a sub-block based merge mode. The SbTVMP mode can be enabled or disabled by a sequence parameter set (SPS) flag. In some examples, if the SbTMVP mode is enabled, the SbTMVP candidate is added as the first entry of the list of sub-block based merge candidates, and followed by the affine merge candidates. In some embodiments, the maximum allowed size of the sub-block based merge list is set to five. However, other sizes may be utilized in other embodiments.

In some embodiments, the encoding logic of the additional SbTMVP merge candidate is the same as for the other merge candidates. That is, for each block in a P or B slice, an additional rate-distortion check can be performed to determine whether to use the SbTMVP candidate.

4. History-Based Motion Vector Prediction (HMVP) Mode

FIG. 11A is a flow chart outlining a process (1100) of constructing and updating a list of motion information candidates using a history based MV prediction (HMVP) method in accordance with one embodiment.

In some embodiments, a list of motion information candidates using the HMVP method can be constructed and updated during an encoding or decoding process. The list can be referred to as a history list. The history list can be stored in forms of an HMVP table or an HMVP buffer. The history list can be emptied when a new slice begins. In some embodiments, whenever there is an inter-coded non-affine block that is just encoded or decoded, the associated motion information can be added to a last entry of the history list as a new HMVP candidate. Therefore, before processing (encoding or decoding) a current block, the history list with HMVP candidates can be loaded (S1112). The current block can be encoded or decoded using the HMVP candidates in the history list (S1114). Afterwards, the history list can be updated using the motion information for encoding or decoding the current block (S1116).

FIG. 11B is a schematic illustration of updating the list of motion information candidates using the history based MV prediction method in accordance with one embodiment. FIG. 11B shows a history list having a size of L, where each candidate in the list can be identified with an index ranging from 0 to L−1. L is an integer equal to or greater than 0. Before encoding or decoding a current block, the history list (1120) includes L candidates HMVP₀, HMVP₁, HMVP₂, . . . HMVP_(m), . . . , HMVP_(L-2), and HMVP_(L-1), where in is an integer ranging from 0 to L. After encoding or decoding a current block, a new entry HMVP_(C) is to be added to the history list.

In an example, the size of the history list can be set to 6, which indicates up to 6 HMVP candidates can be added to the history list. When inserting a new motion candidate (e.g., HMVP_(C)) to the history list, a constrained first-in-first-out (FIFO) rule can be utilized, wherein a redundancy check is first applied to find whether there is a redundant HMVP in the history list. When no redundant HMVP is found, the first HMVP candidate (HMVP₁ in FIG. 11B example, with index=0) is removed from the list, and all other HMVP candidates afterwards are moved forward, e.g., with indices reduced by 1. The new HMVP_(C) candidate can be added to the last entry of the list (with index=L−1 in FIG. 11B for example), as shown in the resulting list (1130). On the other hand, if a redundant HMVP is found (such as HMVP₂ in FIG. 11B example), the redundant HMVP in the history list is removed from the list, and all the HMVP candidates afterwards are moved forward, e.g., with indices reduced by 1. The new HMVP_(C) candidate can be added to the last entry of the list (with index=L−1 in FIG. 11B for example), as shown in the resulting list (1140).

In some examples, the HMVP candidates could be used in the merge candidate list construction process. For example, the latest HMVP candidates in the list can be checked in order and inserted into the candidate list after a TMVP candidate. Pruning can be applied on the HMVP candidates against the spatial or temporal merge candidates, but not the sub-block motion candidates (i.e., SbTMVP candidates) in some embodiments.

In some embodiments, to reduce the number of pruning operations, one or more of the following rules can be followed:

-   -   (a) Number of HMPV candidates to be checked denoted by M is set         as follows:         M=(N<=4)?L:(8−N),     -   wherein N indicates a number of available non-sub block merge         candidates, and L indicates number of available HMVP candidates         in the history list.     -   (b) In addition, once the total number of available merge         candidates becomes only one less than a signaled maximum number         of merge candidates, the merge candidate list construction         process from HMVP list can be terminated.     -   (c) Moreover, the number of pairs for combined bi-predictive         merge candidate derivation can be reduced from 12 to 6.

In some embodiments, HMVP candidates can be used in an AMVP candidate list construction process. The motion vectors of the last K HMVP candidates in the history list can be added to an AMVP candidate list after a TMVP candidate. In some examples, only HMVP candidates with the same reference picture as an AMVP target reference picture are to be added to the AMVP candidate list. Pruning can be applied on the HMVP candidates. In some examples, K is set to 4 while the AMVP list size is kept unchanged, e.g., equal to 2.

5. Pairwise Average Motion Vector Candidates

In some embodiments, pairwise average candidates can be generated by averaging predefined pairs of candidates in a current merge candidate list. For example, the predefined pairs are defined as {(0, 1), (0, 2), (1, 2), (0, 3), (1, 3), (2, 3)} in an embodiment, where the numbers denote the merge indices to the merge candidate list. For example, the averaged motion vectors are calculated separately for each reference picture list. If both to-be-averaged motion vectors are available in one list, these two motion vectors are averaged even when they point to different reference pictures. If only one motion vector is available, the available one can be used directly. If no motion vector is available, the respective pair is skipped in one example. The pairwise average candidates replace the combined candidates in some embodiments in constructing a merge candidate list.

6. Merge with Motion Vector Difference (MMVD) Mode

In some embodiments, a merge with motion vector difference (MMVD) mode is used for determining a motion vector predictor of a current block. The MMVD mode can be used when skip mode or merge mode is enabled. The MMVD mode reuses merge candidates on a merge candidate list of the skip mode or merge mode. For example, a merge candidate selected from the merge candidate list can be used to provide a starting point at a reference picture. A motion vector of the current block can be expressed with the starting point and a motion offset including a motion magnitude and a motion direction with respect to the starting point. At an encoder side, selection of the merge candidate and determination of the motion offset can be based on a search process (an evaluation process). At a decoder side, the selected merge candidate and the motion offset can be determined based on signaling from the encoder side.

The MMVD mode can reuse a merge candidate list constructed in various inter prediction modes described herein. In some examples, only candidates of a default merge type (e.g., MRG_TYPE_DEFAULT_N) on the merge candidate list are considered for MMVD mode. Examples of the merge candidates of the default merge types can include (i) merge candidates employed in the merge mode, (ii) merge candidates from a history buffer in the HMVP mode, and (iii) pairwise average motion vector candidates as described herein. Merge candidates in the affine mode or SbTMVP mode are not used for expansion in MMVD mode in some examples.

A base candidate index (IDX) can be used to define the starting point. For example, a list of merge candidates (motion vector predicators (MVPs)) associated with indices from 0 to 3 is shown in Table 1. The merge candidate having an index of the base candidate index can be determined from the list, and used to provide the starting point.

TABLE 1 Base candidate IDX Base candidate IDX 0 1 2 3 N^(th) MVP 1^(st) MVP 2^(nd) MVP 3^(rd) MVP 4^(th) MVP

A distance index can be used to provide motion magnitude information. For example, a plurality of predefined pixel distances are shown in Table 2 each associated with indices from 0 to 7. The pixel distance having an index of the distance index can be determined from the plurality of pixel distances, and used to provide the motion magnitude.

TABLE 2 Distance IDX Distance IDX 0 1 2 3 4 5 6 7 Pixel ¼- ½- 1- 2- 4- 8- 16- 32- distance pel pel pel pel pel pel pel pel

A direction index can be used to provide motion direction information. For example, four directions with indices from 00 to 11 (binary) are shown in Table 3. The direction with an index of the direction index can be determined from the four directions, and used to provide a direction of the motion offset with respect to the starting point.

TABLE 3 Direction IDX Direction IDX 00 01 10 11 x-axis + − N/A N/A y-axis N/A N/A + −

MMVD syntax elements can be transmitted in a bitstream to signal a set of MMVD indices including a base candidate index, a direction index, and a distance IDX in the MMVD mode.

In some embodiments, an MMVD enable flag is signaled after sending a skip and merge flag for coding a current block. For example, when the skip and merge flag is true, the MMVD flag is parsed. When the MMVD flag is equal to 1, in an example, the MMVD syntax elements (the set of MMVD indices) are parsed. In one example, when the MMVD flag is not 1, a flag associated with another mode, such as an AFFINE flag, is parsed. When the AFFINE flag is equal to 1, the AFFINE mode is used for processing the current block. When the AFFINE flag is not 1, in an example, a skip/merge index is parsed for processing the current block with skip/merge mode.

FIGS. 12-13 show an example of a search process in MMVD mode according to an embodiment of the disclosure. By performing the search process, a set of MMVD indices including a base candidate index, a direction index, and a distance index can be determined for a current block (1201) in a current picture (or referred to as a current frame).

As shown in FIGS. 12-13, a first motion vector (1211) and a second motion vector (1221) belonging to a first merge candidate are shown. The first merge candidate can be a merge candidate on a merge candidate list constructed for the current block (1201). The first and second motion vectors (1211) and (1221) can be associated with two reference pictures (1202) and (1203) in reference picture lists L0 and L1, respectively. Accordingly, two starting points (1311) and (1321) in FIG. 13 can be determined at the reference pictures (1202) and (1203).

In an example, based on the starting points (1311) and (1321), multiple predefined points extending from the starting points (1311) and (1321) in vertical directions (represented by +Y, or −Y) or horizontal directions (represented by +X and −X) in the reference pictures (1202) and (1203) can be evaluated. In one example, a pair of points mirroring each other with respect to the respective starting point (1311) or (1321), such as the pair of points (1314) and (1324), or the pair of points (1315) and (1325), can be used to determine a pair of motion vectors which may form a motion vector predictor candidate for the current block (1201). Those motion vector predictor candidates determined based on the predefined points surrounding the starting points (1311) or (1321) can be evaluated.

In addition to the first merge candidate, other available or valid merge candidates on the merge candidate list of the current block (1201) can also be evaluated similarly. In one example, for a uni-predicted merge candidate, only one prediction direction associated with one of the two reference picture lists is evaluated.

Based on the evaluations, a best motion vector predictor candidate can be determined. Accordingly, corresponding to the best motion vector predictor candidate, a best merge candidate can be selected from the merge list, and a motion direction and a motion distance can also be determined. For example, based on the selected merge candidate and the Table 1, a base candidate index can be determined. Based on the selected motion vector predictor, such as that corresponding to the predefined point (1315) (or (1325)), a direction and a distance of the point (1315) with respect to the starting point (1311) can be determined. According to Table 2 and Table 3, a direction index and a distance index can accordingly be determined.

It is noted that the examples described above are merely for illustrative purpose. In alternative examples, based on the motion vector expression method provided in the MMVD mode, the motion distances and motion directions may be defined differently. In addition, the evaluation process (search process) may be performed differently. For example, for a bi-prediction merge candidate, three types of prediction directions (e.g., L0, L1, and L0 and L1) may be evaluated based on a set of predefined distances and directions to select a best motion vector predictor. For another example, a uni-predicted merge candidate may be converted by mirroring or scaling to a bi-predicted merge candidate, and subsequently evaluated. In the above examples, an additional syntax indicating a prediction direction (e.g., L0, L1, or L0 and L1) resulting from the evaluation process may be signaled.

As described above, merge candidates on a merge candidate list are evaluated to determine a base candidate in the MMVD mode at an encoder. At a decoder, using a base candidate index as input, a motion vector predictor can be selected from a merge candidate list. Accordingly, no additional line buffer is needed for the MMVD mode in addition to a line buffer for storage of the merge candidates.

7. Affine Model Representation with Affine Parameter and Base MV 7.1 Affine Motion Derivation

With a 4-parameter affine model, a MV (mv^(h), mv^(v)) at a position (x, y) can be derived as

$\begin{matrix} \left\{ {\begin{matrix} {{{mv}^{h}\left( {x,y} \right)} = {{a\left( {x - x_{base}} \right)} - {b\left( {y - y_{base}} \right)} + {mv}_{base}^{h}}} \\ {{{mv}^{v}\left( {x,y} \right)} = {{b\left( {x - x_{base}} \right)} + {a\left( {y - y_{base}} \right)} + {mv}_{base}^{v}}} \end{matrix}.} \right. & {{Equation}\mspace{14mu} 2.7{.1}} \end{matrix}$

With a 6-parameter affine model, a MV (mv^(h), mv^(v)) at a position (x, y) can be derived as

$\begin{matrix} \left\{ {\begin{matrix} {{{mv}^{h}\left( {x,y} \right)} = {{a\left( {x - x_{base}} \right)} + {c\left( {y - y_{base}} \right)} + {mv}_{base}^{h}}} \\ {{{mv}^{v}\left( {x,y} \right)} = {{b\left( {x - x_{base}} \right)} + {d\left( {y - y_{base}} \right)} + {mv}_{base}^{v}}} \end{matrix}.} \right. & {{Equation}\mspace{14mu} 2.7{.2}} \end{matrix}$

In the above equations 2.7.1 and 2.7.2, MV_(base) (mv^(h) _(base), mv^(v) _(base)) is a base MV at a base position (x_(base), y_(base)), and (a, b), or (a, b, c, d) represent affine parameters for the 4-parameter affine model and 6-parameter affine model, respectively. The affine parameters can be calculated as:

$\begin{matrix} {{a = \frac{\left( {{mv}_{1}^{h} - {mv}_{0}^{h}} \right)}{Lx}},{b = \frac{\left( {{mv_{1}^{v}} - {mv}_{0}^{v}} \right)}{Lx}},} & {{Equation}\mspace{14mu} 2.7{.3}} \\ {{c = \frac{\left( {{mv}_{2}^{h} - {mv}_{0}^{h}} \right)}{Ly}},{d = \frac{\left( {{mv_{2}^{v}} - {mv_{0}^{v}}} \right)}{Ly}},} & {{Equation}\mspace{14mu} 2.7{.4}} \\ {{{Lx} = {x_{1} - x_{0}}},{{Ly} = {y_{2} - y_{0}}},} & {{Equation}\mspace{14mu} 2.7{.5}} \end{matrix}$

where MV0 (mv₀ ^(h), mv₀ ^(v)), MV1 (mv₁ ^(h), mv₁ ^(v)) and MV2 (mv₂ ^(h), mv₂ ^(v)), represent three control point MVs (CPMVs) at position (x0, y0), (x1, y1) and (x2, y2), respectively. (x0, y0), (x1, y1) and (x2, y2) are typically set to be the top-left, top-right and bottom-left corner of an affine coded block with a size of w×h. Accordingly, Lx can be set to be w and Ly can be set to be h.

It should be noted that the base MV is not necessary to be one of the CPMVs of an affine coded block, although it is set to be the CPMV MV0 at the top-left corner (x0, y0) of an affine coded block in some embodiments.

7.2 Affine Inheritance Crossing CTU Rows

FIG. 14 shows a current CTU row (1430) and an above CTU row (1420) on top of the current CTU row (1430). The current CTU row (1430) includes a current CTU (1404) under processing that includes an affine coded current CU (1410). As shown, the current CU (1410) includes three control points with coordinates (x0, y0), (x1, y1), and (x2, y2) corresponding to three CPMVs, MV_(C0), MV_(C1), and MV_(C2). The current CU (1410) has a width of w.

The above CTU row (1420) includes CTUs (1401), (1402) and (1403), and a set of minimum blocks (or 4×4 blocks) denoted LL, B3, B2, N0, B0, B1, N1, R, R2, and RR. The CTU (1402) includes an affine coded neighboring CU (1411) of the current CU (1410).

In a first example, when an affine model of the current CU (1410) is inherited from a neighboring 4×4 block in the above CTU row (1420), MVs stored in a regular MV buffer are accessed. FIG. 14 shows an example when the current CU (1410) applies affine merge mode, inheriting the affine model from a neighboring block B0. In this case, a codec can store the width of the CU (1411) covering B0 (Wn in FIG. 14), MVs of the bottom-left 4×4 block (N0) and bottom-right 4×4 block (N1) of the CU (1411) (MV_(N0) and MV_(N1) in FIG. 14), and a base position which is the bottom-left coordinator (x_(N0), y_(N0)) of NO. In this example, MV_(N0) is used as a base MV.

In order to access MVs stored in a regular MV buffer, the width Wn and the x-component of the bottom-left coordinate x_(N0) of the CU (1411) containing the 4×4 block can be stored for a 4×4 block at a line-buffer (e.g., B0). For example, for each 8×8 block, 3 bits for Wn and 5 bits for x_(N0) are required to be stored.

To reduce a size of line buffer, in a second example, a storage of a CU width and an x-component of a bottom-left coordinate of each 8×8 block is removed from the line-buffer. When the current CU (1410) applies affine inheritance from a neighboring 4×4 block such as B0 in FIG. 14, the 4×4 block right-next to B0, or left-next to B0 which is also affine-coded and has the same reference picture index as B0, is chosen as B0′. The regular MVs stored in B0 and B0′ are accessed as MVB and MVB′. MV0 and MV1 are set to be MVB and MVB′ to derive a and b by equation 2.7.3 with Lx=4. CPMVs of the current CU (1410) are derived by equation 2.7.1 with the center position of B0 as the base position and MVB as the base MV.

With the proposed method, at most 36 4×4 blocks from B3 to R2 as shown in FIG. 14 may be accessed at CTU-row boundary. The additional information needs to be loaded on cache is reduced from 4464 bits to 2*72=144 bits (or 2*10=20 bytes in a byte-alignment implementation).

7.3 Affine Inheritance Inside a CTU Row

In an example, when an affine model of a current CU is inherited from a neighboring 4×4 block in a current CTU row, CPMVs stored in a local CPMV buffer (In-CTU-buffer) can be accessed. The current CU can inherit the 4-parameter or the 6-parameter affine model from the neighboring CU based on the CPMVs stored in the local buffer. For a 4×4 block inside a CTU, three CPMVs for two reference lists, the width, the height and the top-left coordinate of a CU containing the 4×4 block can be stored.

To reduce a size of the local CPMV buffer, in another example, affine parameters instead of three CPMVs and the block dimensions are stored. When a current CU applies affine-inheritance merge mode, affine parameters are directly copied from a neighboring 4×4 block, denoted B, to be inherited. And a MV of each sub-block in the current CU is derived, for example, by equation 2.7.2 with a center position of B as a base position and regular MV at B as a base MV. When the current CU applies affine AMVP mode, CPMVs of the current CU are derived by equation 2.7.2 also with the center position of B as the base position and regular MV at B as the base MV, and the derived CPMVs will serve as the motion vector predictors (MVPs).

In an example, each affine parameter is stored as an 8-bit signed integer. So 2×4×8=64 bits can be stored for affine parameters in each 8×8 block inside a CTU. With this method, the In-CTU-buffer is increased by 48×64=3072 bits (or 48×8=384 bytes in a byte-alignment implementation) compared with storage of CPMVs). With the method, one set of affine parameters are calculated at most only once compared with the method of storage of CPMVs where the affine parameters may be calculated twice.

8. History-Based Affine Predication (Affine HMVP) 8.1 Affine HMVP Table

In some examples, an affine HMVP table storing affine motion candidates is employed. After coding an affine coded current CU, motion information of the current CU is used to update the affine HMVP table. Similar to the regular HMVP table updating process, when adding a new motion candidate to the affine HMVP table, a constrained FIFO rule is utilized. For example, a redundancy check is firstly applied to find whether there is an identical affine HMVP candidate in the affine HMVP table. If found, the identical affine HMVP candidate is removed from the affine HMVP table. All the affine HMVP candidates afterwards are moved forward, i.e., with indices reduced by 1. In an example, a size of the affine HMVP table is set to 5 (five entries in the table), which is the same as a sub-block merge list size used in some embodiments. In an example, the HMVP table is reset at the beginning of a CTU row.

In an example, for each entry of the affine HMVP table, the following motion information is stored with a memory requirement listed:

Affine CPMVs mv0, mv1, mv2 for 2 reference lists (36 bits * 2 * 3) Reference index of List 0 and/or List1 (4 bits * 2) Inter prediction direction (L0, L1 or Bi-pred) (2 bits) Affine type, whether 4-parameter or 6-parameter affine (1 bit) Position (x, y) (16 bits * 2) CU Width and height (5 bits * 2) Generalized bi-prediction index (GBI) (optional) (3 bits) Total memory required: 36*2*3 + 4*2 + 2 + 1 + 16*2 + 5*2 + 3 = 272 bits

Accordingly, memory requirements for affine HMVP tables of difference sizes are:

Table size of 1: 272 bits  ~34 bytes Table size of 4: 1088 bits ~136 bytes Table size of 5: 1360 bits ~170 bytes

8.2 Copying Affine CPMVs from an Affine HMVP Table

In an example, an affine HMVP candidate can be directly added to a merge candidate list or an AMVP candidate list as an additional candidate. For example, the affine HMVP candidate can be added at a position after constructed affine candidates and before zero MV candidates. In an example, there is no pruning check when adding an affine HMVP candidate to a merge list. In an example, CPMVs of an affine HMVP candidate are to be applied to a current CU directly regardless of a corresponding history block's shape and size.

8.3 Affine Model Inheritance from an Affine HMVP Table

In an example, an affine model of an affine HMVP candidate is inherited to generate an affine merge candidate or affine AMVP candidate. Similar to affine mode inheritance (or affine inheritance) from spatial neighbors, affine inheritance from an affine HMVP table uses a position, block width and/or height, and CPMVs stored in an affine HMVP buffer to generate affine motion information.

8.3.1 Replacing Affine Inheritance from Spatial Neighbors with Inheritance from an Affine HMVP Table

Inherited affine merge candidates and inherited affine AMVP candidates can be derived from left and above neighboring blocks coded in affine mode. In an example, those affine candidates inherited from spatial neighbors are replaced with inherited candidates derived from an affine HMVP table. The affine merge and AMVP candidates inherited from the affine HMVP can take the same positions as the replaced inherited affine candidates. In an example, at most two inherited candidates from the affine HMVP table are allowed in both affine merge mode and affine AMVP mode.

In an example, entries in the affine HMVP tables are checked starting from a latest entry. Only when an affine HMVP candidate neighbors a current CU, the affine HMVP candidate would be used to derive the inherited candidate. Whether an affine HMVP candidate is a neighbor of the current CU can be determined because position and size information are stored in the affine HMVP table. For the affine HMVP candidate that is identified as neighbors of the current CU, the width, height and CPMVs of this identified candidate are then used to derive CPMVs of the current CU in the same way as affine inheritance from spatial neighbors.

8.3.2 Affine Inheritance from Affine HMVP Table Combined with Affine Inheritance from Above CTU Using Motion Data Line Buffer

In an example, in addition to the affine inheritance from an affine HMVP table, as described in 8.3.1, affine inheritance from motion data line buffer is also used for blocks located adjacent to the top boundary of a current CTU.

Affine motion data (or affine model) inheritance from above CTU is described below. If a candidate CU for affine motion data inheritance is in an above CTU line (or row), regular MVs of a bottom-left and bottom-right sub-block (minimum block) (e.g., blocks with a size of 4×4 pixels) in the line buffer instead of CPMVs are used for affine MVP derivation. In this way, no CPMVs corresponding to candidate CUs in the above CTU row are stored, and only CPMVs of candidate CUs within a current CTU row are stored in a local buffer.

If the candidate CU in the above CTU row is coded with a 6-parameter affine model, the affine model is degraded to a 4-parameter model for inheritance. Since the sub-block (minimum block) MVs represent the motion at the center of the respective sub-block, the distance of the two corner sub-block MVs at the bottom of the candidate CU is neiW−4 pixels, wherein neiW is the width of the candidate CU. To avoid division by (neiW−4), which may not be power of 2, a rough distance neiW is used for the inheritance. The coordinates of bottom-left and bottom-right corner are set to (xNb, yNb+neiH) and (xNb+neiW, yNb+neiH) for inheritance, wherein neiH is the height of the candidate CU.

FIG. 15 shows an example of affine inheritance from an above CTU line buffer. As shown, a first CTU row is above a CTU boundary (1511), and a second CTU row is below the CTU boundary (1511). A current CTU is in the second CTU row and includes an affine coded current CU having CPMVs v₀ , v₁ , and v₂ at control points (x0, y0), (x1, y1), and (x2, y2). The current CU has neighboring CUs (or blocks) E, B, C, and D that are affine coded. The top-left and top-right corners of the block E have coordinates of (x_(E0), y_(E0)), and (x_(E1), y_(E1)), respectively. CPMVs v_(E0) , v_(E1) , v_(B0) , v_(B1) , v_(C0) , v_(C1) , v_(D0) , and v_(D1) corresponding to each of the blocks E, B, C, and D are shown, and can be saved to a local buffer of the current CTU for affine inheritance from spatial neighbors of the current CU.

Sub-block (minimum block) motion vectors indicated by dashed arrows (1502) and solid arrows (1503) are also shown. Those sub-block motion vectors correspond to minimum sub-blocks that have a minimum allowable block size (typically 4×4 pixels). Motion information of each such minimum block can be stored in a memory when an inter coded block including the respective minimum blocks is processed and motion information of the inter coded block is available. The motion information corresponding to the minimum blocks, including the respective motion vectors indicated by arrows (1502) and (1503), can be used for everything, such as motion compensation (MC), merge/skip mode, AMVP mode, deblocking, and deriving of TMVPs. With respect to affine motion information, the motion information corresponding to minimum blocks can be referred to as regular motion information.

In addition, the regular motion information of the minimum blocks above the CTU boundary (1511) can be stored in an above CTU row line buffer (1520), and used for affine inheritance for coding CUs within the current CTU and adjacent to the CTU boundary (1511).

As an example, along the top CTU boundary (1511), the bottom-left and bottom right sub-block motion vectors of a CU are used for everything and stored in the line buffer (1520). These sub-block MVs are also used for affine inheritance of neighboring affine CUs in bottom CTUs (CTUs in the second row below the CTU boundary 1511). For example in CU E, the bottom-left and bottom right corner sub-block MVs v_(LE0) and v_(LE1) (marked in dashed arrows) are stored in the line buffer 1520, and used for affine inheritance. The MVs v_(LE0) and v_(LE1) can each start from a central position, (x_(LE0), y_(LE0)), or (x_(LE1), y_(LE1)), in the respective sub-block. In an example, the MVs v_(LE0) and v_(LE1) can also be used for merge/skip/AMVP list derivation of neighboring CUs in bottom CTUs and for de-blocking.

As an example, based on the MVs v_(LE0) and v_(LE1) at positions (x_(LE0), y_(LE0)), or (x_(LE1), y_(LE1)), respectively, the CPMVs v₀ , and v₁ of the current CU can be derived by using the 4-parameter model as follows,

$\begin{matrix} \left\{ \begin{matrix} {v_{0x} = {{\frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0x}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0}} \right)}\left( {x_{0} - x_{{LE}\; 0}} \right)} - \begin{matrix} \frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0_{\;}}} \right)} \\ {\left( {y_{0} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0x}} \end{matrix}}} \\ {v_{0y} = {{\frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0}} \right)}\left( {x_{0} - x_{{LE}\; 0}} \right)} + \begin{matrix} \frac{\left( {v_{{{LE}\; 1x}\;} - v_{{LE}\; 0\; x}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0_{\;}}} \right)} \\ {\left( {y_{0} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0y}} \end{matrix}}} \end{matrix} \right. & {{Equation}\mspace{14mu} 2.8{.1}} \\ \left\{ \begin{matrix} {v_{1x} = {{\frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0\; x}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0_{\;}}} \right)}\left( {x_{1} - x_{{LE}\; 0}} \right)} - \begin{matrix} \frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0}} \right)} \\ {\left( {y_{1} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0x}} \end{matrix}}} \\ {v_{1y} = {{\frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0_{\;}}} \right)}\left( {x_{1} - x_{{LE}\; 0}} \right)} + \begin{matrix} \frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0\; x}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0}} \right)} \\ {\left( {y_{1} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0y}} \end{matrix}}} \end{matrix} \right. & {{Equation}\mspace{14mu} 2.8{.2}} \end{matrix}$

And, if the current CU uses the 6-parameter affine motion model, the control point vectors v₂ can be derived by using the 4-parameter mode as follows,

$\quad\begin{matrix} \left\{ \begin{matrix} {v_{2x} = {{\frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0x}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0}} \right)}\left( {x_{2} - x_{{LE}\; 0}} \right)} - \begin{matrix} \frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}_{0\;}}} \right)} \\ {\left( {y_{2} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0x}} \end{matrix}}} \\ {v_{2y} = {{\frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0_{\;}}} \right)}\left( {x_{2} - x_{{LE}\; 0}} \right)} + \begin{matrix} \frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0\; x}} \right)}{\left( {x_{{LE}\; 1} - x_{{LE}\; 0}} \right)} \\ {\left( {y_{2} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0y}} \end{matrix}}} \end{matrix} \right. & {{Equation}\mspace{14mu} 2.8{.3}} \end{matrix}$

In the above equations 2.8.1-2.8.3, the coordinates of the central positions corresponding to the MVs v_(LE0) and v_(LE1) are substituted with that of the bottom-left and bottom-right corner of the CU E as follows,

$\begin{matrix} \left\{ \begin{matrix} {x_{{LE}\; 0} = x_{E\; 0}} \\ {x_{{LE}\; 1} = x_{E\; 1}} \\ {y_{{LE}\; 0} = y_{0}} \\ {y_{{LE}\; 1} = y_{0}} \end{matrix} \right. & {{Equation}\mspace{14mu} 2.8{.4}} \end{matrix}$ As a result, a width of CU E is used in place of a distance between the positions (x_(LE0), y_(LE0)) and (x_(LE1), y_(LE1)).

8.4 Affine HMVP Table with Affine Parameters Stored

In an example, an affine HMVP table is constructed in a way similar to the methods described 8.1. However, instead of storing the affine CPMV values, affine parameters (e.g. the parameters a, b, c, or d in equations 2.7.3 and 2.7.4) are stored in each affine HMVP entry. Affine inheritance may be performed using the affine parameters from Affine HMVP to generate affine motion information for affine merge or affine AMVP candidates. In an example, history-based affine merge candidates (HAMC) are included into a sub-block based merge candidate list.

For example, after decoding an affine-coded CU, a set of affine parameters {a, b, c, d} for the two reference picture lists and associated reference indices are put into an affine parameter history table.

An HAMC can be derived by combining a set of affine parameters stored in the table and a regular MV of a neighboring 4×4 block that serves as a base MV. For example, the MV of the current block at position (x, y) is calculated as,

$\quad\left\{ \begin{matrix} {{m{v^{h}\left( {x,y} \right)}} = {{a\left( {x - x_{base}} \right)} + {c\left( {y - y_{base}} \right)} + {mv_{base}^{h}}}} \\ {{m{v^{v}\left( {x,\ y} \right)}} = {{b\left( {x - x_{base}} \right)} + {d\left( {y - y_{base}} \right)} + {mv_{base}^{v}}}} \end{matrix} \right.$ where (mv^(h) _(base), mv^(v) _(base)) represents the MV of the neighboring 4×4 block, (x_(base), y_(base)) represents a center position of the neighboring 4×4 block, and (x, y) can be the top-left, top-right and bottom-left corner of the current block to obtain the CPMVs.

In an example, HAMCs derived from stored affine parameters and base MVs from spatial neighboring blocks are put into a sub-block based merge list after a constructed affine merge candidate. For each set of stored affine parameters in the HMVP table, a first valid neighboring 4×4 block with the same inter-prediction direction and reference indices as those associated with the set of affine parameters is used to derive the HAMC.

In an example, HAMCs derived from stored affine parameters and base MVs from temporal neighboring block are put into a sub-block based before zero candidate. For each set of stored affine parameters, the respective TMVP is scaled to the reference picture the parameters referring to, to derive the HAMC.

In an example, each affine model parameter can be stored as an 8-bit signed integer. Up to 6 affine parameter sets are stored. Therefore, the affine parameter history table can be small, and for example, has a size of 6×(8×4×2+8)=432 bits (42 bytes).

III. Other Affine Model Inheritance Techniques

As described, in order to save local memory used for processing a CTU, affine inheritance from neighboring blocks can be replaced with affine inheritance from an affine HMVP table. In addition, affine inheritance from minimum block motion information (or regular motion information) stored in an above CTU row line buffer can improve affine inheritance performance without the need for a local memory for affine CPMV storage.

To further improve affine motion based coding performance, other affine model inheritance techniques can be employed. For example, affine inheritance from regular motion information of neighboring blocks located at a left CTU boundary can be employed. The affine inheritance from blocks above CTU (with regular motion information stored in a line buffer) can further be improved.

1. Affine Inheritance from Regular Motion Information of Minimum Blocks in the Rightmost Column of a Left Neighboring CTU

In some embodiments, for an affine coded current block adjacent to the left boundary of a current CTU, regular motion information of a rightmost column of minimum blocks of a left neighboring CTU can be used to derive an affine motion model for affine inheritance. For example, along the right CTU boundary of the left neighboring CTU, an affine coded CU in the left neighboring CTU can be identified. The top-right and bottom right sub-block (or minimum block) motion vectors of the identified affine coded CU can be stored in a local buffer (or referred to as a left CTU boundary line buffer), and used for affine inheritance of affine CUs in the current CTU as well as for other processing operations (such as MC/merge mode/skip mode/AMVP mode/deblocking/TMVP determination processing, and the like).

In an example, the affine coded CU in the left neighboring CTU can be identified by checking some predefined candidate positions along the left boundary of the current CTU according to a predefined order. For example, those candidate positions can be represented by the minimum blocks of the rightmost column of minimum blocks of the left neighboring CTU.

Embodiment 1.1

In an embodiment, when a current block is located at the left edge of a current CTU, the current block's CPMVs can be determined based on an affine motion model inherited from regular motion vectors stored in the right-most column of minimum blocks of a left neighboring CTU of the current CTU. Subsequently, sub-block motion vectors of the current block can be derived from the current block's CPMVs.

FIG. 16 shows the same current CU as in FIG. 15 but with CU D at the top-left corner and CU E at the bottom-left corner. Different from the FIG. 15 example, an affine merge or AMVP candidate can be derived from regular motion information of a rightmost column of minimum blocks (1601) in the left CTU (1610) of the current CTU. For example, CU E in the left CTU (1610) is affine coded. The top-left and bottom-left corners of CU E have coordinates of (x_(E0), y_(E0)), and (x_(E1), y_(E1)), respectively. The top-right and bottom right corner sub-block of CU E have MVs V_(LE0) and V_(LE1) (marked in dashed arrows) that can be stored in a local buffer for storing regular motion vectors of the left CTU. The MVs V_(LE0) and V_(LE1) can be used for the affine inheritance as well as deviation of a merge/skip/AMVP list or de-blocking of neighboring CUs in the current CTU.

Based on the MVs V_(LE0) and V_(LE1) , the CPMVs v₀ and v₁ of the current CU can be derived as follows when a 4-parameter affine model is used for the current block,

$\begin{matrix} \left\{ \begin{matrix} {v_{0x} = {{\frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0x}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)}\left( {x_{0} - x_{{LE}\; 0}} \right)} - \begin{matrix} \frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)} \\ {\left( {y_{0} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0x}} \end{matrix}}} \\ {v_{0y} = {{\frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)}\left( {x_{0} - x_{{LE}\; 0}} \right)} + \begin{matrix} \frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0\; x}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)} \\ {\left( {y_{0} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0y}} \end{matrix}}} \end{matrix} \right. & {{Equation}\mspace{14mu} 3.1{.1}} \\ \left\{ \begin{matrix} {v_{1x} = {{\frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0\; x}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0_{\;}}} \right)}\left( {x_{1} - x_{{LE}\; 0}} \right)} - \begin{matrix} \frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)} \\ {\left( {y_{1} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0x}} \end{matrix}}} \\ {v_{1y} = {{\frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)}\left( {x_{1} - x_{{LE}\; 0}} \right)} + \begin{matrix} \frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0\; x}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0_{\;}}} \right)} \\ {\left( {y_{1} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0y}} \end{matrix}}} \end{matrix} \right. & {{Equation}\mspace{14mu} 3.1{.2}} \end{matrix}$ where v_(LE0), v_(LE1x), v_(0x), and v_(1x) are horizontal components of the MVs V_(LE0) , V_(LE1) , v₁ and v₁ , respectively, while v_(LE0y), v_(LE1y), v_(0y), and v_(1y) are vertical components of the MVs V_(LE0) , V_(LE1) , v₀ and v₁ , respectively.

When a 6-parameter affine motion model is used for the current block, the CPMV v₂ can be derived by

$\quad\begin{matrix} \left\{ \begin{matrix} {v_{2x} = {{\frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0x}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)}\left( {x_{2} - x_{{LE}\; 0}} \right)} - \begin{matrix} \frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)} \\ {\left( {y_{2} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0x}} \end{matrix}}} \\ {v_{2y} = {{\frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0\; y}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)}\left( {x_{2} - x_{{LE}\; 0}} \right)} + \begin{matrix} \frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0\; x}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)} \\ {\left( {y_{2} - y_{{LE}\; 0}} \right) + v_{{LE}\; 0y}} \end{matrix}}} \end{matrix} \right. & {{Equation}\mspace{14mu} 3.1{.3}} \end{matrix}$ where v_(2x) and v_(2y) are horizontal and vertical components of the CPMV v₂ .

In an example, the coordinates of positions of the MVs V_(LE0) and V_(LE1) at the top-right and bottom-right sub-blocks of CU E satisfy the following conditions:

$\begin{matrix} \left\{ \begin{matrix} {x_{{LE}\; 0} = x_{E\; 0}} \\ {x_{{LE}\; 1} = x_{E\; 1}} \\ {y_{{LE}\; 0} = y_{E\; 0}} \\ {y_{{LE}\; 1} = y_{E\; 1}} \end{matrix} \right. & {{Equation}\mspace{14mu} 3.1{.4}} \end{matrix}$

Under the condition of equation 3.1.4, a height of CU E is used in place of a distance between the positions (x_(LE0), y_(LE0)) and (x_(LE1), y_(LE1)) in FIG. 16. From another perspective, in the equations 3.1.1-3.1.3, the MVs V_(LE0) and V_(LE1) are used as an approximation of CPMVs at the top-right and bottom-right corners of CU E.

Embodiment 1.2

In an embodiment, when a current block is located at the left edge of a current CTU, the current block's sub-block MVs are inherited from regular motion vectors of a right-most column of minimum blocks of the left neighboring CTU without deriving current block's CPMVs. The regular motion vectors can be stored in a local buffer of the current CTU.

For example, in FIG. 16, based on the MVs V_(LE0) and V_(LE1) , for each sub-block of the current CU with a center point located at coordinate (x_(s), y_(s)), an MV v_(s) of the respective sub-block may be derived as follows by using a 4-parameter model:

$\quad\left\{ \begin{matrix} {v_{sx} = {{\frac{\left( {v_{{LE}\; 1x} - v_{{LE}_{0\; x}}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0}} \right)}\left( {x_{s} - x_{{LE}\; 0}} \right)} - {\frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0y}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0_{\;}}} \right)}\left( {y_{2} - y_{{LE}\; 0}} \right)} + v_{{LE}\; 0x}}} \\ {v_{sy} = {{\frac{\left( {v_{{LE}\; 1y} - v_{{LE}\; 0y}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0_{\;}}} \right)}\left( {x_{s} - x_{{LE}\; 0}} \right)} + {\frac{\left( {v_{{LE}\; 1x} - v_{{LE}\; 0x}} \right)}{\left( {y_{{LE}\; 1} - y_{{LE}\; 0_{\;}}} \right)}\left( {y_{2} - y_{{LE}\; 0}} \right)} + v_{{LE}\; 0y}}} \end{matrix} \right.$ where v_(sx) and v_(sy) represent horizontal and vertical components of the v_(s) .

For example, the regular MVs V_(LE0) and V_(LE1) and a distance between the positions of the regular MVs or a height of CU E can be used as an affine merge or AMVP candidate and stored in a merge or AMVP candidate list.

2. Affine Inheritance Based on Accurate Position Information

In some embodiments, regular motion information from an above CTU line buffer and/or a right column of minimum blocks of a neighboring CTU with accurate position information is used to derive an inherited affine candidate.

For example, when deriving an affine model inheritance from regular MVs in a line buffer (above CTU), or a left CTU's right most column, instead of using regular MVs of the sub blocks adjacent to control points as an approximation of the CPMV values, the regular MVs with their precise positions may be used for affine inheritance.

Embodiment 2.1

FIG. 17 shows a current block (1701) adjacent to a top CTU boundary (1711). The current block (1701) can have a height of H and a width of W. A neighboring block (1702) of the current block (1701) is identified in a CTU above the CTU boundary (1711), for example, by checking a candidate position (1731). The neighboring block (1702) can have a width of W′. A sequence of minimum blocks (e.g., having a size of 4×4 pixels) in an above CTU row (1721) each have regular motion information stored in an above CTU line buffer (1720). In an embodiment, the current block (1701)'s sub-block motion vectors may be derived from regular MVs of the minimum blocks in the neighboring block (1702) using affine inheritance with a 4-parameter affine model.

In an example, a set of affine related information, such as an affine flag, the block width (W′), and a block position (e.g., a horizontal coordinate of a bottom-left corner of the neighboring block (1702)), can be associated with the candidate position (1731) and stored in a local buffer or the line buffer (1720). The affine flag can indicate the neighboring block (1702) is affine coded. The block width and the block position together can be used to determine number and positions of each minimum blocks of the neighboring block (1702) along the CTU boundary (1711). By checking the candidate position (1731), the set of affine related information can be obtained.

Based on regular motion information of any two of the minimum blocks of the neighboring block (1702) along the CTU boundary (1711), a 4-parameter affine motion model can be determined and used for the affine inheritance from the above CTU row (1721).

For example, the following two minimum blocks can be selected for affine inheritance: (i) the minimum block (1731) having a regular MV v₀ at a central position (x₀, y₀), and (ii) a minimum block (1732) having a regular MV v₁ at a central position (x₁, y₁). Based on the selected two minimum blocks (1731) and (1732), and the accurate positions (x₀, y₀) and (x₁, y₁), a MV v_(s) at a central position (x, y) of a sub-block of the current block (1701) can be derived as follows,

$\quad\begin{matrix} \left\{ \begin{matrix} {v_{sx} = {{\frac{\left( {v_{1x} - v_{0\; x}} \right)}{\left( {x_{1} - x_{0}} \right)}\left( {x - x_{0}} \right)} - {\frac{\left( {v_{1y} - v_{0\; y}} \right)}{\left( {x_{1} - x_{0}} \right)}\left( {y - y_{0}} \right)} + v_{0x}}} \\ {v_{sy} = {{\frac{\left( {v_{1y} - v_{0\; y}} \right)}{\left( {x_{1} - x_{0}} \right)}\left( {x - x_{0}} \right)} + {\frac{\left( {v_{1x} - \nu_{0\; x}} \right)}{\left( {x_{1} - x_{0}} \right)}\left( {y - y_{0}} \right)} + v_{0y}}} \end{matrix} \right. & {{Equation}\mspace{14mu} 3.2{.1}} \end{matrix}$

In an example, a distance, x₁-x₀, between the positions (x₀, y₀) and (x₁, y₁) is restricted to be a power of 2 when the two minimum blocks (1731) and (1732) are being selected. Under such a configuration, the division operations in equation 3.2.1 can be implemented with shifting operations to reduce computational cost.

In an example, the selected minimum block (1731) is the minimum block adjacent to the bottom-left corner, and the minimum block (1732) is selected to be a bottom-middle sub-block with a horizontal displacement of W′/2 to the sub-block (1731). In this way, the distance, x₁-x₀, between the positions (x₀, y₀) and (x₁, y₁) is restricted to be a half of the width of the neighboring block (1702) that is typically a power of 2.

In an example, CPMVs of the current block 1701 are derived based equation 3.2.1, and used as a merge or AMVP candidate. In another example, the regular MVs v₀ and v₁ and the distance between the two MVs are used as a merge or AMVP candidate and added to a merge or AMVP candidate list.

Embodiment 2.2

FIG. 18 shows a current block (1801) adjacent to a left CTU boundary (1811). The current block (1801) can have a height of H and a width of W. A neighboring block (1802) of the current block (1801) is identified in a CTU to the left of the CTU boundary (1811), for example, by checking a candidate position (1834). The neighboring block (1802) can have a height of H′. A sequence of minimum blocks (e.g., having a size of 4×4 pixels) in a right most column (1821) of a CTU neighboring the current block (1801) each have regular motion information stored in a local buffer (1820). In an embodiment, the current block (1801)'s sub-block motion vectors may be derived from regular MVs of the minimum blocks in the neighboring block (1802) using affine inheritance with a 4-parameter affine model.

Similarly, a set of affine related information, such as an affine flag, the block height (H′), and a block position (e.g., a vertical coordinate of a bottom-right corner of the neighboring block (1802)), can be associated with the candidate position (1834) and stored in the line buffer (1820).

Based on regular motion information of any two of the minimum blocks of the neighboring block (1802) along the CTU boundary (1811), a 4-parameter affine motion model can be determined and used for the affine inheritance from the right-most column (1821).

For example, the following two minimum blocks can be selected for affine inheritance: (i) the minimum block (1831) having a regular MV v₀ at a central position (x₀, y₀), and (ii) a minimum block (1832) having a regular MV v₁ at a central position (x₁, y₁). Based on the selected two minimum blocks (1831) and (1832), and the accurate positions (x₀, y₀) and (x₁, y₁), a MV v_(s) at a central position (x, y) of a sub-block of the current block (1801) can be derived as follows,

$\quad\begin{matrix} \left\{ \begin{matrix} {v_{sx}^{\prime} = {{\frac{\left( {\nu_{1x} - v_{0x}} \right)}{\left( {y_{1} - y_{0}} \right)}\left( {x - x_{0}} \right)} - {\frac{\left( {v_{1y} - v_{0\; y}} \right)}{\left( {y_{1} - y_{0}} \right)}\left( {y - y_{0}} \right)} + v_{0x}}} \\ {v_{sy} = {{\frac{\left( {v_{1y} - v_{0y}} \right)}{\left( {y_{1} - y_{0}} \right)}\left( {x - x_{0}} \right)} + {\frac{\left( {v_{1x} - \nu_{0x}} \right)}{\left( {y_{1} - y_{0}} \right)}\left( {y - y_{0}} \right)} + v_{0y}}} \end{matrix} \right. & {{Equation}\mspace{14mu} 3.2{.2}} \end{matrix}$

Similarly, a distance, y₁-y₀, between the positions (x₀, y₀) and (x₁, y₁) can be restricted to be a power of 2. Under such a configuration, the division operations in equation 3.2.2 can be implemented with shifting operations to reduce computational cost.

In an example, the selected minimum block (1831) is the minimum block adjacent to the top-right corner, and the minimum block (1832) is selected to be a right-middle sub-block with a horizontal displacement of H′/2 to the sub-block (1831). In this way, the distance, y₁-y₀, between the positions (x₀, y₀) and (x₁, y₁) is restricted to be a half of the height of the neighboring block (1802) that is typically a power of 2.

Embodiment 2.3

Depending on a location of a current block, the methods as described in the embodiment 2.1 and/or 2.2 can be used to determine one or more inherited affine merge candidates. For example, when the current block is adjacent to a top CTU boundary, the methods of embodiment 2.1 can be employed. When the current block is adjacent to a left CTU boundary, the methods of embodiment 2.2 can be employed. When the current block is adjacent to a top-left corner of a CTU, the methods of both the embodiments 2.1 and 2.2 can be employed.

In an example, a checking at candidate positions for availability of affine coded blocks neighboring a current block can be performed in a way similar to the methods described in the section II. 2 based on FIG. 8. In an example, the availability checking for affine coded blocks can be performed using neighboring positions of a current block (1901) depicted in FIG. 19 in any predefined orders.

Taking FIG. 19 as an example, when the current block (1901) is adjacent to a top CTU boundary, the availability checking for affine coded neighboring blocks above the top CTU boundary can be performed over the positions B2, B3, B1, and B0 in a predefined order. When the current block (1901) is adjacent to a left CTU boundary, the availability checking for affine coded neighboring blocks adjacent to the left CTU boundary can be performed over the positions A0, A1, and A2 in a predefined order. When the current block (1901) is adjacent to a top-left corner of a current CTU, the availability checking for affine coded blocks can be performed over the positions A0, A1, A2, B2, B3, B1, and B0 in a predefined order.

In other examples, the set of positions for checking affine coded block availability can be defined differently from that in FIG. 8 or 19 examples.

3. Combination of Affine Inheritance Sources

Affine inheritance sources can include (i) an affine HMVP table, (ii) regular MVs (or regular motion information) of sub-blocks (minimum blocks) of affine neighboring blocks above a CTU boundary, (iii) regular MVs of sub-blocks of affine neighboring blocks on the left of a CTU boundary, or (iv) spatial neighboring affine blocks (e.g., affine motion information in the form of CPMVs or affine model parameters). In various embodiments, different affine inheritance sources can be employed for encoding or decoding a current block in a current CTU.

Embodiment 3.1

In an embodiment, affine inheritance is performed from an affine HMVP table. Affine inheritance from spatial neighboring affine blocks or regular MVs of affine neighboring blocks is not used.

Embodiment 3.2

In an embodiment, when spatial neighbors of the current block are located within the current CTU, affine inheritance from the spatial neighbors may be replace by affine inheritance from an affine HMVP table.

For example, the current block is not adjacent to a top, a left, or both boundaries of a current CTU. No affine inheritance from spatial neighbors is performed. Instead, affine inheritance from the affine HMVP table is used.

Embodiment 3.3

In another embodiment, when the current block is located adjacent to the top boundary of the current CTU, affine inheritance from the current block's left neighboring blocks may be replaced by affine inheritance from an affine HMVP table. Affine inheritance from the current block's above neighboring blocks may be replaced by affine inheritance from regular MVs of the neighboring affine blocks stored in an above CTU motion data line buffer.

An order of affine inheritance from the affine inheritance sources can be:

-   -   a. the affine HMVP table→regular MVs from the above CTU         boundary; or     -   b. regular MVs from the above CTU boundary→the affine HMVP         table.

For example, when inherited affine merge candidates on a merge candidate list for processing the current block is limited to a maximum allowed number N, affine candidate availability checking can be performed according to the order of a or b. The first N available affine candidates can be selected to be included in the merge candidate list.

Embodiment 3.4

In another embodiment, when the current block is located adjacent to the left boundary of the current CTU, the affine inheritance from its above neighboring blocks may be replaced by affine inheritance from an affine HMVP table; and the affine inheritance from its left neighboring blocks may be replaced by inheritance from regular MVs of a neighboring affine block stored in a local MV buffer corresponding to a left CTU neighboring the current CTU.

An order of affine inheritance from the affine inheritance sources can be:

-   -   a. the affine HMVP table→regular MVs from the left CTU boundary;         or     -   b. regular MVs from the left CTU boundary→the affine HMVP table.

Embodiment 3.5

In another embodiment, when the current block is located adjacent to the top-left corner of the current CTU, the affine inheritance from the current block's left neighboring blocks may be replaced by affine inheritance from an affine HMVP table; and the affine inheritance from the current block's above neighboring blocks may be replaced by inheritance from regular MVs of the neighboring affine block stored in an above CTU motion data line buffer.

An order of affine inheritance from the affine inheritance sources can be:

-   -   a. an affine HMVP table→regular MVs from the above CTU boundary;         or     -   b. regular MVs from the above CTU boundary→the Affine HMVP         table.

Embodiment 3.6

In another embodiment, when the current block is located adjacent to the top-left corner of the current CTU, the affine inheritance from the current block's above neighboring blocks may be replaced by affine inheritance from an affine HMVP table; and the affine inheritance from the current block's left neighboring blocks may be replaced by inheritance from regular MVs of a neighboring affine block stored in a local MV buffer corresponding to the left CTU.

An order of affine inheritance from the affine inheritance sources can be:

-   -   a. the affine HMVP table→regular MVs from the left CTU boundary;         or     -   b. regular MVs from the left CTU boundary→the affine HMVP table.

Embodiment 3.7

In another embodiment, when the current block is located adjacent to the top-left corner of the current CTU, the affine inheritance from the current block's left neighboring blocks may be replaced by affine inheritance from regular MVs of a neighboring affine block stored in a local MV buffer corresponding to the left CTU; and the affine inheritance from the current block's above neighboring blocks may be replaced by inheritance from regular MVs of a neighboring affine block stored in an above CTU motion data line buffer.

An order of affine inheritance from the affine inheritance sources can be:

-   -   a. regular MVs from the left CTU boundary→regular MVs from above         CTU boundary; or     -   b. regular MVs from the above CTU boundary→regular MVs from the         left CTU boundary.

When more than 2 inherited affine merge candidates are allowed, inheritance from an affine HMVP table may be used as additional candidates to affine merge candidates inherited from the left or the above CTU boundary. In such case, an order of affine inheritance from the affine inheritance sources can be:

-   -   a. regular MVs from the left CTU boundary→regular MVs from the         above CTU boundary→an affine HMVP table;     -   b. regular MVs from the above CTU boundary→regular MVs from the         left CTU boundary→an affine HMVP table;     -   c. an affine HMVP table→regular MVs from the above CTU         boundary→regular MVs from the left CTU boundary;     -   d. an affine HMVP table→regular MVs from the left CTU         boundary→regular MVs from the above CTU boundary;     -   e. regular MVs from the above CTU boundary→an affine HMVP         table→regular MVs from the left CTU boundary.     -   f. regular MVs from the left CTU boundary→an affine HMVP         table→regular MVs from the above CTU boundary.

Embodiment 3.8

In another embodiment, when the current block is located adjacent to the top-left corner of the current CTU, availability of neighboring affine blocks may be checked in a predefined order, and inherited affine merge candidates of the current block may be derived from regular MVs corresponding to the first N available neighboring affine blocks.

In various examples, the checked positions can be the positions shown in FIG. 19, {A0, A1, A2, B0, B1, B2, B3}, or any subset of the depicted positions. An order of availability checking may be one of any predefined orders.

4. Number of Inherited Merge Candidates to be Used in Affine Inheritance

In an example, up to 2 affine inheritances are used for affine merge candidates and/or affine AMVP candidates. For example, a sub-block based merge candidate list can be constructed for processing a current block. The sub-block based merge candidate list can include a number of sub-block based TMVP (SubTMVP) merge candidates, and a number of inherited affine merge candidates, followed by a number of constructed affine merge candidates. When the number of the available merge candidates is smaller than a maximum allowed number, the sub-block based merge candidate list can be filled with zero candidates. The number of inherited affine merge candidates can be configured to be 2, or have a default number of two.

In an example, such as the example of the section 11.8.3.2, when a current block is not adjacent to a current CTU top boundary, up to two inheritances from an affine HMVP table are allowed; and when the current block is located at the top of the current CTU (adjacent to CTU top boundary), one inheritance is allowed to be from above CTU (from regular MVs stored in an above CTU line buffer), and the other inheritance is allowed to be from the affine HMVP table. If there's no affine candidates above CTU and/or no valid affine candidates in the affine HMVP table, the number of inheritances used may be less than 2.

In some embodiments, to further improve coding efficiency, more affine inheritances may be allowed for determining inherited affine merge candidates in affine merge or affine AMVP.

Embodiment 4.1

In one embodiment, up to M affine inheritances from an affine HMVP table are always allowed. If a current block is at the top of a CTU boundary, up to N inheritances from regular MVs of an above CTU are also allowed as additional inherited affine merge candidates.

In one example, M is equal to 2, and N is equal to 1. The values of M and/or N may be other integer values, and are not limited by this example.

The valid inherited candidates may be added to an affine merge list (e.g., a merge list including affine merge candidates) or an affine AMVP candidate list (e.g., an AMVP candidate list including affine AMVP candidates) in any configured or predefined order.

Embodiment 4.2

In another embodiment, up to M affine inheritances from an affine HMVP table are always allowed. If a current block is at the left of a CTU boundary, up to N inheritances from regular MVs of a left CTU is also allowed as additional candidates.

In one example, M is equal to 2, and N is equal to 1. The values of M and/or N may be other integer values, and are not limited by this example.

The valid inherited candidates may be added to an affine merge list or an affine AMVP candidate list in any order.

Embodiment 4.3

In another embodiment, up to M affine inheritances from an affine HMVP table are always allowed. If a current block is at the top-left corner of a current CTU, up to N inheritances from a left CTU are also allowed as additional affine merge candidates, and up to K inheritances from an above CTU are also allowed as additional candidates.

In one example, M is equal to 2, N is equal to 1, and K is equal to 1. The values of M, N, or K may be other integer values, and are not limited by this example.

The valid inherited candidates may be added to an affine merge list or an affine AMVP candidate list in any order.

5. Affine HMVP Table Storing Affine Parameters

In some examples, affine inheritance from an affine HMVP table is used to replace affine inheritance from spatial neighboring affine blocks, as described in the section 11.8.3.1 and 11.8.3.2. This affine inheritance from an affine HMVP table may be based on different affine HMVP table implementations.

Embodiment 5.1

In an embodiment, when an affine HMVP table is implemented using the method as described in the section 11.2.8.4, inherited affine merge candidates on a merge or AMVP list from spatial neighboring blocks may be replaced by affine candidates from the affine HMVP table with affine parameters stored. For example, the affine merge candidates can take the form of affine parameters (e.g., the affine parameter a, b, c, or d in equations 2.7.3 and 2.7.4) instead of CPMVs.

6. An Example Process of Affine Model Inheritance

FIG. 20 shows a flow chart outlining a process (2000) according to some embodiments of the disclosure. The process (2000) can be used for decoding an affine coded block. In various embodiments, the process (2000) are executed by processing circuitry, such as the processing circuitry in the terminal devices (210), (220), (230) and (240), the processing circuitry that performs functions of the video decoder (310), the processing circuitry that performs functions of the video decoder (410), and the like. In some embodiments, the process (2000) is implemented in software instructions, thus when the processing circuitry executes the software instructions, the processing circuitry performs the process (2000). The process starts at (S2001) and proceeds to (S2010).

At S2010, an affine coded current block in a current CTU is received. The current block can be encoded with an AMVP mode or a merge mode.

At S2020, a position of the current block within the current CTU is determined based on coordinate information associated with the current block.

At S2030, when the current block is on a left boundary of the current CTU, a four parameter affine model can be inherited from regular motion information in a left neighboring CTU of the current CTU. For example, a merge or AMVP candidate list can be constructed to decode the current block. The inherited affine model can be used to determine an affine candidate on the merge or AMVP candidate list. For example, CPMVs of the current block or affine model parameters can be determined based on the regular motion information, and stored as the affine candidate.

For example, the four parameter affine model can be determined based on regular motion information of two minimum blocks in a rightmost column of minimum blocks of the left neighboring CTU. That regular motion information can be retrieved from a local memory for decoding the current CTU. Either an approximated distance or an accurate distance between respective regular MVs can be used in different embodiments.

In some examples, an additional merge or AMVP candidate can be inherited from an HMVP table in addition to the one inherited from the left neighboring CTU.

At S2040, when the current block is on a top boundary of the current CTU, a four parameter affine model can be inherited from regular motion information in a CTU row above the current CTU. Similarly, the inherited affine model can be used to determine an affine candidate on the merge or AMVP candidate list. For example, CPMVs of the current block or affine model parameters can be determined based on the regular motion information, and stored as the affine candidate.

For example, the four parameter affine model can be determined based on regular motion information of two minimum blocks from a bottom row of minimum blocks in the CTU row above the current CTU row. That regular motion information can be retrieved from an above CTU row line buffer.

In some examples, an additional merge or AMVP candidate can be inherited from an HMVP table in addition to the one inherited from the CTU row above the current CTU.

At S2050, when the current block is adjacent to a top-left corner of the current CTU, two four parameter affine models can be inherited based on regular motion information from the left neighboring CTU and the CTU row above the current CTU, respectively.

In some example, more than two inherited affine candidate are allowed. An additional inherited affine candidate can be from an HMVP table.

At S2060, when the current block is not adjacent to the top or left boundary of the current CTU, one or more affine candidates can be inherited from an HMVP table. In some examples, inheritance from regular motion information from neighboring CTUs is not used.

Following each of S2030-S2060, the process 2000 may proceed to S2099, and terminate at S2099.

IV. Computer System

The techniques described above, can be implemented as computer software using computer-readable instructions and physically stored in one or more computer-readable media. For example, FIG. 21 shows a computer system (2100) suitable for implementing certain embodiments of the disclosed subject matter.

The computer software can be coded using any suitable machine code or computer language, that may be subject to assembly, compilation, linking, or like mechanisms to create code comprising instructions that can be executed directly, or through interpretation, micro-code execution, and the like, by one or more computer central processing units (CPUs), Graphics Processing Units (GPUs), and the like.

The instructions can be executed on various types of computers or components thereof, including, for example, personal computers, tablet computers, servers, smartphones, gaming devices, internet of things devices, and the like.

The components shown in FIG. 21 for computer system (2100) are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing embodiments of the present disclosure. Neither should the configuration of components be interpreted as having any dependency or requirement relating to any one or combination of components illustrated in the exemplary embodiment of a computer system (2100).

Computer system (2100) may include certain human interface input devices. Such a human interface input device may be responsive to input by one or more human users through, for example, tactile input (such as: keystrokes, swipes, data glove movements), audio input (such as: voice, clapping), visual input (such as: gestures), olfactory input (not depicted). The human interface devices can also be used to capture certain media not necessarily directly related to conscious input by a human, such as audio (such as: speech, music, ambient sound), images (such as: scanned images, photographic images obtain from a still image camera), video (such as two-dimensional video, three-dimensional video including stereoscopic video).

Input human interface devices may include one or more of (only one of each depicted): keyboard (2101), mouse (2102), trackpad (2103), touch screen (2110), data-glove (not shown), joystick (2105), microphone (2106), scanner (2107), camera (2108).

Computer system (2100) may also include certain human interface output devices. Such human interface output devices may be stimulating the senses of one or more human users through, for example, tactile output, sound, light, and smell/taste. Such human interface output devices may include tactile output devices (for example tactile feedback by the touch-screen (2110), data-glove (not shown), or joystick (2105), but there can also be tactile feedback devices that do not serve as input devices), audio output devices (such as: speakers (2109), headphones (not depicted)), visual output devices (such as screens (2110) to include CRT screens, LCD screens, plasma screens, OLED screens, each with or without touch-screen input capability, each with or without tactile feedback capability—some of which may be capable to output two dimensional visual output or more than three dimensional output through means such as stereographic output; virtual-reality glasses (not depicted), holographic displays and smoke tanks (not depicted)), and printers (not depicted).

Computer system (2100) can also include human accessible storage devices and their associated media such as optical media including CD/DVD ROM/RW (2120) with CD/DVD or the like media (2121), thumb-drive (2122), removable hard drive or solid state drive (2123), legacy magnetic media such as tape and floppy disc (not depicted), specialized ROM/ASIC/PLD based devices such as security dongles (not depicted), and the like.

Those skilled in the art should also understand that term “computer readable media” as used in connection with the presently disclosed subject matter does not encompass transmission media, carrier waves, or other transitory signals.

Computer system (2100) can also include an interface to one or more communication networks. Networks can for example be wireless, wireline, optical. Networks can further be local, wide-area, metropolitan, vehicular and industrial, real-time, delay-tolerant, and so on. Examples of networks include local area networks such as Ethernet, wireless LANs, cellular networks to include GSM, 3G, 4G, 5G, LTE and the like, TV wireline or wireless wide area digital networks to include cable TV, satellite TV, and terrestrial broadcast TV, vehicular and industrial to include CANBus, and so forth. Certain networks commonly require external network interface adapters that attached to certain general purpose data ports or peripheral buses (2149) (such as, for example USB ports of the computer system (2100)); others are commonly integrated into the core of the computer system (2100) by attachment to a system bus as described below (for example Ethernet interface into a PC computer system or cellular network interface into a smartphone computer system). Using any of these networks, computer system (2100) can communicate with other entities. Such communication can be uni-directional, receive only (for example, broadcast TV), uni-directional send-only (for example CANbus to certain CANbus devices), or bi-directional, for example to other computer systems using local or wide area digital networks. Certain protocols and protocol stacks can be used on each of those networks and network interfaces as described above.

Aforementioned human interface devices, human-accessible storage devices, and network interfaces can be attached to a core (2140) of the computer system (2100).

The core (2140) can include one or more Central Processing Units (CPU) (2141), Graphics Processing Units (GPU) (2142), specialized programmable processing units in the form of Field Programmable Gate Areas (FPGA) (2143), hardware accelerators for certain tasks (2144), and so forth. These devices, along with Read-only memory (ROM) (2145), Random-access memory (2146), internal mass storage such as internal non-user accessible hard drives, SSDs, and the like (2147), may be connected through a system bus (2148). In some computer systems, the system bus (2148) can be accessible in the form of one or more physical plugs to enable extensions by additional CPUs, GPU, and the like. The peripheral devices can be attached either directly to the core's system bus (2148), or through a peripheral bus (2149). Architectures for a peripheral bus include PCI, USB, and the like.

CPUs (2141), GPUs (2142), FPGAs (2143), and accelerators (2144) can execute certain instructions that, in combination, can make up the aforementioned computer code. That computer code can be stored in ROM (2145) or RAM (2146). Transitional data can be also be stored in RAM (2146), whereas permanent data can be stored for example, in the internal mass storage (2147). Fast storage and retrieve to any of the memory devices can be enabled through the use of cache memory, that can be closely associated with one or more CPU (2141), GPU (2142), mass storage (2147), ROM (2145), RAM (2146), and the like.

The computer readable media can have computer code thereon for performing various computer-implemented operations. The media and computer code can be those specially designed and constructed for the purposes of the present disclosure, or they can be of the kind well known and available to those having skill in the computer software arts.

As an example and not by way of limitation, the computer system having architecture (2100), and specifically the core (2140) can provide functionality as a result of processor(s) (including CPUs, GPUs, FPGA, accelerators, and the like) executing software embodied in one or more tangible, computer-readable media. Such computer-readable media can be media associated with user-accessible mass storage as introduced above, as well as certain storage of the core (2140) that are of non-transitory nature, such as core-internal mass storage (2147) or ROM (2145). The software implementing various embodiments of the present disclosure can be stored in such devices and executed by core (2140). A computer-readable medium can include one or more memory devices or chips, according to particular needs. The software can cause the core (2140) and specifically the processors therein (including CPU, GPU, FPGA, and the like) to execute particular processes or particular parts of particular processes described herein, including defining data structures stored in RAM (2146) and modifying such data structures according to the processes defined by the software. In addition or as an alternative, the computer system can provide functionality as a result of logic hardwired or otherwise embodied in a circuit (for example: accelerator (2144)), which can operate in place of or together with software to execute particular processes or particular parts of particular processes described herein. Reference to software can encompass logic, and vice versa, where appropriate. Reference to a computer-readable media can encompass a circuit (such as an integrated circuit (IC)) storing software for execution, a circuit embodying logic for execution, or both, where appropriate. The present disclosure encompasses any suitable combination of hardware and software.

APPENDIX A: ACRONYMS

-   AMVP: Advanced Motion Vector Prediction -   ASIC: Application-Specific Integrated Circuit -   BMS: benchmark set -   CANBus: Controller Area Network Bus -   CD: Compact Disc -   CPMV: Control Point Motion Vector -   CPUs: Central Processing Units -   CRT: Cathode Ray Tube -   CTUs: Coding Tree Units -   CU: Coding Unit -   DVD: Digital Video Disc -   FPGA: Field Programmable Gate Areas -   GBi: Generalized Bi-prediction -   GOPs: Groups of Pictures -   GPUs: Graphics Processing Units -   GSM: Global System for Mobile communications -   HEVC: High Efficiency Video Coding -   HMVP: History-based Motion Vector Prediction -   HRD: Hypothetical Reference Decoder -   IC: Integrated Circuit -   JEM: joint exploration model -   LAN: Local Area Network -   LCD: Liquid-Crystal Display -   LTE: Long-Term Evolution -   MMVD: Merge with MVD -   MV: Motion Vector -   MVD: Motion Vector Difference -   MVP: Motion Vector Predictor -   OLED: Organic Light-Emitting Diode -   PBs: Prediction Blocks -   PCI: Peripheral Component Interconnect -   PLD: Programmable Logic Device -   PUs: Prediction Units -   RAM: Random Access Memory -   ROM: Read-Only Memory -   SEI: Supplementary Enhancement Information -   SNR: Signal Noise Ratio -   SSD: solid-state drive -   SPS: Sequence Parameter Set -   sbTMVP: subblock-based temporal motion vector prediction -   TMVP: Temporal Motion Vector Prediction -   TUs: Transform Units, -   USB: Universal Serial Bus -   VUI: Video Usability Information -   VVC: versatile video coding

While this disclosure has described several exemplary embodiments, there are alterations, permutations, and various substitute equivalents, which fall within the scope of the disclosure. It will thus be appreciated that those skilled in the art will be able to devise numerous systems and methods which, although not explicitly shown or described herein, embody the principles of the disclosure and are thus within the spirit and scope thereof 

What is claimed is:
 1. A method of video decoding at a video decoder, comprising: receiving a current block that is affine coded and included in a current coding tree unit (CTU); determining an affine model based on first regular motion information of two first minimum sized blocks in a rightmost column of minimum sized blocks of a left neighboring CTU of the current CTU in response to a determination that the current block is adjacent to a left boundary of the current CTU, the first regular motion information of the two first minimum sized blocks being retrieved from a line buffer that stores only regular motion information of minimum sized blocks located in the rightmost column of the left neighboring CTU; and determining a first inherited affine candidate based on the determined affine model; constructing a merge candidate list or an AMVP candidate list, of which a maximum number of inherited affine candidates is more than two, the merge candidate list or the AMVP candidate list including an inherited affine candidate from a history-based motion vector prediction (HMVP) table that includes an HMVP candidate representing the determined affine model with affine parameters, wherein in response to a determination that the current block is adjacent to a top or the left boundary of the current CTU but not adjacent to a top-left corner of the current CTU, the merge candidate list or the AMVP candidate list includes up to M1 inherited affine candidates from a history-based motion vector prediction (HMVP) table, M1 being an integer greater than or equal to 2, and up to N1 inherited affine candidates determined based on regular motion information of minimum sized blocks along the top or left boundary of the current CTU, N1 being an integer greater than or equal to 1, and in response to a determination that the current block is adjacent to the top-left corner of the current CTU, the merge candidate list or the AMVP candidate list includes up to M2 inherited affine candidates from the HMVP table, M2 being an integer greater than or equal to 1, up to K inherited affine candidates determined based on regular motion information of minimum sized blocks along a top boundary of the current CTU, K being an integer greater than or equal to 1, and up to N2 inherited affine candidates determined based on regular motion information of minimum sized blocks along the left boundary of the current CTU, N2 being an integer greater than or equal to
 1. 2. The method of claim 1, wherein the determining the first inherited affine candidate includes: determining control point motion vectors (CPMVs) of the current block based on the determined affine model; and determining the first inherited affine candidate based on the determined CPMVs.
 3. The method of claim 1, further comprising: determining sub-block motion vectors (MVs) of the current block based on the first regular motion information of the two first minimum sized blocks without deriving control point motion vectors (CPMVs) of the current block.
 4. The method of claim 1, wherein the determined affine model is a four parameter affine model determined by using MVs of the two first minimum sized blocks that are adjacent to control points of an affine coded left neighboring block of the current block as an approximation of control point motion vectors (CPMVs) at the control points of the affine coded left neighboring block, and wherein the first inherited affine candidate is determined based on the four parameter affine model.
 5. The method of claim 1, wherein the determined affine model is a four parameter affine model determined by using precise positions of two MVs of the two first minimum sized blocks that are within an affine coded left neighboring block of the current block, and wherein the first inherited affine candidate is determined based on the four parameter affine model.
 6. The method of claim 5, wherein a distance between the precise positions of the two MVs of the two first minimum sized blocks is a power of two.
 7. The method of claim 5, wherein a first one of the two first minimum sized blocks is adjacent to a control point of the affine coded left neighboring block, and a distance between the precise positions of the two MVs of the two first minimum sized blocks is a half of a height of the affine coded left neighboring block.
 8. The method of claim 1, further comprising: including an inherited affine candidate from the HMVP table in a merge candidate list or the AMVP candidate list that includes at most two inherited affine candidates.
 9. The method of claim 1, further comprising: determining a second affine model based on second regular motion information of two second minimum sized blocks in a bottom row of minimum sized blocks above a CTU row including the current CTU in response to a determination that the current block is adjacent to a top boundary of the current CTU; and determining a second inherited affine candidate based on the determined second affine model.
 10. The method of claim 9, wherein the determined second affine model is a four parameter affine model determined by using precise positions of two MVs of the two second minimum sized blocks that are within an affine coded top neighboring block of the current block, and wherein the second inherited affine candidate is determined based on the four parameter affine model.
 11. The method of claim 10, wherein a distance between the precise positions of the two MVs of the two second minimum sized blocks is a power of two.
 12. The method of claim 10, wherein a first one of the two second minimum sized blocks is adjacent to a control point of the affine coded top neighboring block, and a distance between the precise positions of the two MVs of the two second minimum sized blocks is a half of a width of the affine coded top neighboring block.
 13. The method of claim 9, further comprising: in response to a determination that the current block is adjacent to the top boundary of the current CTU, including an inherited affine candidate from the HMVP table in a merge candidate list or the AMVP candidate list that includes at most two inherited affine candidates.
 14. The method of claim 1, further comprising: in response to a determination that the current block is not adjacent to the left or a top boundary of the current CTU, determining an inherited affine candidate based on an affine model of a spatial neighbor of the current block that is stored in a local buffer.
 15. The method of claim 1, further comprising: in response to a determination that the current block is adjacent to a top-left corner, the left boundary, or a top boundary of the current CTU, checking an availability of affine coded blocks that are outside the current CTU and neighbor the current block at predefined candidate positions according to a predefined order; and determining one or more inherited affine candidates based on regular motion information of minimum sized blocks corresponding to first N available affine coded blocks determined from the checking, N being an integer greater than zero.
 16. An apparatus of video decoding, comprising: processing circuitry configured to: receive a current block that is affine coded and included in a current coding tree unit (CTU); determine an affine model based on regular motion information of two minimum sized blocks in a rightmost column of minimum sized blocks of a left neighboring CTU of the current CTU in response to a determination that the current block is adjacent to a left boundary of the current CTU, the regular motion information of the two first minimum sized blocks being retrieved from a line buffer that stores only regular motion information of minimum sized blocks located in the rightmost column of the left neighboring CTU; determine an inherited affine candidate based on the determined affine model; and constructing a merge candidate list or an AMVP candidate list, of which a maximum number of inherited affine candidates is more than two, the merge candidate list or the AMVP candidate list including an inherited affine candidate from a history-based motion vector prediction (HMVP) table that includes an HMVP candidate representing the determined affine model with affine parameters, wherein in response to a determination that the current block is adjacent to a top or the left boundary of the current CTU but not adjacent to a top-left corner of the current CTU, the merge candidate list or the AMVP candidate list includes up to M1 inherited affine candidates from a history-based motion vector prediction (HMVP) table, M1 being an integer greater than or equal to 2, and up to N1 inherited affine candidates determined based on regular motion information of minimum sized blocks along the top or left boundary of the current CTU, N1 being an integer greater than or equal to 1, and in response to a determination that the current block is adjacent to the top-left corner of the current CTU, the merge candidate list or the AMVP candidate list includes up to M2 inherited affine candidates from the HMVP table, M2 being an integer greater than or equal to 1, up to K inherited affine candidates determined based on regular motion information of minimum sized blocks along a top boundary of the current CTU, K being an integer greater than or equal to 1, and up to N2 inherited affine candidates determined based on regular motion information of minimum sized blocks along the left boundary of the current CTU, N2 being an integer greater than or equal to
 1. 17. A non-transitory computer-readable medium storing instructions that when executed by a computer for video decoding cause the computer to perform a method for video decoding, the method comprising: receiving a current block that is affine coded and included in a current coding tree unit (CTU); determining an affine model based on regular motion information of two minimum sized blocks in a rightmost column of minimum sized blocks of a left neighboring CTU of the current CTU in response to a determination that the current block is adjacent to a left boundary of the current CTU, the regular motion information of the two first minimum sized blocks being retrieved from a line buffer that stores only regular motion information of minimum sized blocks located in the rightmost column of the left neighboring CTU; determining an inherited affine candidate based on the determined affine model; and constructing a merge candidate list or an AMVP candidate list, of which a maximum number of inherited affine candidates is more than two, the merge candidate list or the AMVP candidate list including an inherited affine candidate from a history-based motion vector prediction (HMVP) table that includes an HMVP candidate representing the determined affine model with affine parameters, wherein in response to a determination that the current block is adjacent to a top or the left boundary of the current CTU but not adjacent to a top-left corner of the current CTU, the merge candidate list or the AMVP candidate list includes up to M1 inherited affine candidates from a history-based motion vector prediction (HMVP) table, M1 being an integer greater than or equal to 2, and up to N1 inherited affine candidates determined based on regular motion information of minimum sized blocks along a top or left boundary of the current CTU, N1 being an integer greater than or equal to 1, and in response to a determination that the current block is adjacent to the top-left corner of the current CTU, the merge candidate list or the AMVP candidate list includes up to M2 inherited affine candidates from the HMVP table, M2 being an integer greater than or equal to 1, up to K inherited affine candidates determined based on regular motion information of minimum sized blocks along the top boundary of the current CTU, K being an integer greater than or equal to 1, and up to N2 inherited affine candidates determined based on regular motion information of minimum sized blocks along the left boundary of the current CTU, N2 being an integer greater than or equal to
 1. 